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**Spelling errors/mistyped words
Yes, I  know there are  spelling errors,  and things are  mistyped. It
seems no matter  how hard I try  my fingers hit 't'  twice when typing
'compatible' rendering it 'compattible' numerous, (thousands actually)
times.  I  don't have the  time or the will  to check the  spelling of
everything. Basic spell checking has been peformed. Please let me know
if  there is  anything that  would lead  to incorrect  information, or
something  is so  mangled  that  it needs  revising.  But  if you  can
basically  understand  what was  intended,  just  cope with  it.  Just
cope:-)

BTW, "110" port is  an "I/O" port that has been OCRed  badly, as is an
"1/0" port.

**Info needed on:...
**A note on VESA support of 486 chipsets....
**Datasheets:...
*_IBM...
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*AMD . . . . . . . [no datasheets, some info]...
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*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
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*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
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*Winbond...
**W86C450/P Universal Asynchronous Receiver/Transmitter         <Jul89
***Info:

GENERAL DESCRIPTION

The  W860450/P is an  improved specification  version of  the W86C250A
Universal  Asynchronous  Receiver/Transmitter  [UART).   The  improved
specifications   ensure   compatibility   with  the   state-of-the-art
CPUs. Functionally, the W860450/P is equivalent to the INS8250A of the
National  Semiconductor. The W86C450/P  is fabricated  using WINBOND‘s
CMOS process.  The W860450/P performs serial-to-parallel conversion on
data  characters received  from a  peripheral device  or a  MODEM, and
parallel-to-serial  conversion on  data characters  received  from the
CPU. The CPU can read the complete status of the W860450/P at any time
during the functional  operation. Status information reported includes
the  type  and   condition  operation.   Status  information  reported
includes  the type  and  condition of  the  transfer operations  being
performed by the  W860450/P, as well as any  error conditions (parity,
overrun, framing, or break interrupt).

The  W860450/P includes  a programmable  baud rate  generator  that is
capable of dividing the timing  reference clock input by divisors of l
to  (2^16 -  4),  and producing  16x  clock for  driving the  internal
transmitter logic. Provisions are also  included to use this 16x clock
to  capability and  a  processor-interrupt system.  Interrupts can  be
programmed  to  the  user's  requirements,  minimizing  the  computing
required to handle the communications link.

***Versions:...
***Features:...
**W86C451   I/O controller for IBM PC/AT/XT                     <Jul89...
**W86C452   I/O controller for IBM PC/AT                         Jul89...
**W86C456   I/O controller [no datasheet]                            ?
**W860551/P UART with FIFO and Printer Port Controller             <94...
**
**Other:...
*ZyMOS...
*General Sources:...