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**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



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**5581/5582      (Jessie)  Pentium PCI/ISA Chipset (75MHz)   <04/15/97
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**5591/5592/5595 (David)   Pentium PCI A.G.P. Chipset        <01/09/98...
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**5597/5598      (Jedi)    Pentium PCI/ISA Chipset           <04/15/97...
**530/5595       (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
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**55x            SoC (System-on-chip)                        <03/14/02...
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**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
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**WD7625     Desktop Buffer Manager                          <10/01/92
***Info:
INTRODUCTION
This document describes the two separate functions, Address Buffer and
Data Buffer,  available in  the WD7625LV chip.  A strapping  input pin
selects  the Data  Buffer  Function when  strapped  low, otherwise  it
selects the Address Buffer Function.

GENERAL DESCRIPTION
The  WD7625LV is  a  combination design  which  includes two  separate
functions: Address  Buffer and Data  Buffer in one chip.   A strapping
input pin  selects the  Data Buffer  Function if  it is  strapped low;
otherwise, it  selects the Address  Buffer Function. For  designs that
use  both  the data  buffer  and  the  address buffer  functions,  two
WD7625LV devices are needed in the system.

In the Address Buffer Function,  the WD7625LV is an address buffer and
power management chip.  

In the Data Buffer Function, the WD7625LV is a data buffer, IDE buffer
and I/O register device for the WD7x00 16-bit chip sets.
***Versions:...
***Features:...
**WD8120LV   Super I/O [no datasheet]                                ?
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