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**Spelling errors/mistyped words
Yes, I know there are spelling errors, and things are mistyped. It
seems no matter how hard I try my fingers hit 't' twice when typing
'compatible' rendering it 'compattible' numerous, (thousands actually)
times. I don't have the time or the will to check the spelling of
everything. Basic spell checking has been peformed. Please let me know
if there is anything that would lead to incorrect information, or
something is so mangled that it needs revising. But if you can
basically understand what was intended, just cope with it. Just
cope:-)
BTW, "110" port is an "I/O" port that has been OCRed badly, as is an
"1/0" port.
**Info needed on:...
**A note on VESA support of 486 chipsets....
**Datasheets:...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
**WD7615 Desktop Buffer Manager <04/15/92
***Info:...
***Versions:...
***Features:
o Allows the WD7XC10 based designs to work with a generic "Super l/O"
device or with the WD76C20 and WD76C30
o Replaces majority of external "glue" logic, up to 13 devices:
- AT bus address buffers with 24 mA drive
- AT bus interrupt multiplexing, and interrupt pull ups.
- AT bus DRQ multiplexing and internal pull downs.
- Keyboard/mouse interrupt latching and clearing functions
- A20 Gate logic
- Controlling the IDE data bit 7 at address 3F7H.
o Allows implementation of a desktop system with only three external
devices
o Direct connect to AT address bus SA1 through SA19 and LA17 through
LA23 with 24 mA drive
o DAC multiplexing and RESET generation
o DRAM WE signal from WD76C10 inversion and buffering
o SMEMR and SMEMW generation with 24mA direct drive
o Divide by 2 or divide by 4 clock output
o 136-pin MQFP package
**WD7625 Desktop Buffer Manager <10/01/92...
**WD8120LV Super I/O [no datasheet] ?
**Other Chips:...
*Winbond...
*ZyMOS...
*General Sources:...
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