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**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



**800 series...
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**SL82C470   'Mozart' 486/386 EISA chipset                     c:Dec91
***Info:...
***Configurations:...
***Features:
o   100% EISA compatible
o   20/25/33/50 MHz 80486 DX/SX CPU operation
o   25/33/40 Mhz 80386DX CPU Operation
o   Integrated write back cache controller with built-in tag comparator
o   Concurrent CPU-cache and EMA/master operations with bus snooping
o   Only ten TTL components are required
o   Complete EISA system can be built on a baby AT sized motherboard
o   Flexible cache size from 64KB to 1MB
o   Page mode DRAM operation supporting 1 to 4 banks up to 256MB
o   Video/system BIOS, shadowing and caching
o   Supports both conventional and concurrent configurations
o   Inclusive secondary cache for snoop filtering
o   Synchronous EISA bus clock
o   Transparent Gate A20 and CPU reset
o   CPU local bus device support
o   Supports 80387, 80487SX and Weitek 3167/4167 co-processors
o   Decoupled refresh without holding CPU
o   Staggered DRAM refresh to minimize power supply noise
o   Rlch set of register options to allow customization
o   Three 160-pin PQFP packages in low power and high speed 0.8um CMOS 
    Technology
**SL82C490   'Wagner' 486?              [no datasheet]               ?...
**SL82C550   'Rossini' Pentium          [no datasheet]            c:95...
**
**Support Chips:
**SL82C365    Cache Controller (for 386DX/SX)                     c:91...
**SL82C465    Cache Controller (for 486/386DX/SX)                 c:91...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
**FE2011        CPU Core Logic for PS/2 Model 30 Compatible       c:87
***Info:...
***Versions:...
***Features:...
**FE3400/B      80286-Based AT Compatible CPU Core Logic (12 MHz) c:86...
**FE3500/B      80286-Based AT Compatible CPU Core Logic (12 MHz) c:87...
**FE3600/A/B/C  16/20MHz AT Chip set                              c:88...
**FE5300        CPU Core Logic for PS/2 Model 50/60 Compatibles   c:87...
**FE5400        CPU Core Logic for PS/2 Model 50/60 Compatibles   c:87...
**FE6500        CPU Core Logic for PS/2 Model 70/80 Compatibles   c:88...
**WD6400SX/LP   CPU Core Logic for PS/2 386SX Compatibles          <90...
**WD6500        CPU Core Logic for PS/2 386DX/486 Compatible       <90...
**WD7600A/LP/LV System Chip Set for 80286 or 80386SX         <11/25/91...
**WD7700/LP     System Chip Set for 80286 or 80386SX (Cache) <11/25/91...
**WD7855        System controller for 80386SX                <09/25/92...
**WD7900/LP/LV  System Chip Set for 80286 or 80386SX (Cache) <11/25/91...
**WD8110        System controller for 80386DX/486            <11/30/93
***Notes:...
***Info:...
***Configurations:...
***Features:...
**
**Support Chips:
**WD76C20x   Floppy, RTC, IDE and Support Logic Device       <11/25/91...
**WD76C30x   Perip. Ctrl, Interrupt Multiplex, and Clock Gen <11/18/91...
**WD7615     Desktop Buffer Manager                          <04/15/92...
**WD7625     Desktop Buffer Manager                          <10/01/92...
**WD8120LV   Super I/O [no datasheet]                                ?
**Other Chips:...
*Winbond...
*ZyMOS...
*General Sources:...