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**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



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**SL82C490   'Wagner' 486?              [no datasheet]               ?
***Notes:...
**SL82C550   'Rossini' Pentium          [no datasheet]            c:95...
**
**Support Chips:
**SL82C365    Cache Controller (for 386DX/SX)                     c:91...
**SL82C465    Cache Controller (for 486/386DX/SX)                 c:91...
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*Unresearched:...
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*Western Digital...
**FE2011        CPU Core Logic for PS/2 Model 30 Compatible       c:87
***Info:
The FE2011 is  a single chip implementation of  all, core logic needed
to support the 16-bit Intel  8086 Central Processing Unit (CPU) in the
creation  of  a  high  performance  IBM  Personal  System/2  Model  30
compatible computer.  It replaces  nearly 100 components used in prior
8086-based designs.

The FE2011  is 100% hardware, register level,  and software compatible
with the PS/2 Model 30. Operating with a 10 MHz clock rate, the FE2011
improves PS/2 Model 30 performance by up to 25%.

Highly Integrated Functional Capabilities
The  FE2011 contains all  processor and  peripheral support  logic. It
includes an 8237A compatible Direct Memory Access (DMA) controller, an
8259A  interrupt  controller  with  interrupt extension  that  handles
shared  interrupts,  an 8253  compatible  timer,  and 8255  compatible
peripheral I/O port.

It  also   includes  logic  for  bus  control,   DRAM  control,  clock
generation, and the bidirectional keyboard/mouse port.

The FE2011 contains address and  data buffers which enable the user to
drive an expansion bus without external drivers.  A memory data buffer
and DRAM  address multiplexer  make it easy  to interface  directly to
memory.

The FE2011 has built-in extended  memory support (the Lotus, Intel and
Microsoft  implementation of  EMS) that  allows  access to  up to  2.5
Mbytes of memory through use of four page registers.

A system board  I/O decoder provides chip select  signals for on-board
peripherals: parallel port, serial  port, floppy disk controller, hard
disk controller and display adapter.

Implementation Flexibility
The FE2011  supports a flexible memory architecture.   It allows usage
of 64K, 256K and 1M DRAM in five different configurations.

With the  EMS feature, the  FE2011 supports a  total of 2.5  Mbytes of
memory consisting of 640K of conventional memory and 1920K of expanded
memory. Operation at 10 MHz requires the use of 100 ns DRAM.

The  FE2011 is designed  for performance  flexibility. It  operates at
software  selectable CPU  clock rates  of 7.15  or 9.54  MHz  that are
derived  from a  single  28.636 MHz  crystal.  The FE2011  can be  op-
tionally  driven  at  8   or  10  MHz  using  external  crystal/oscil-
lators. In addition, the FE2011 supports, software selectable DMA wait
states of zero or one.  

Packaging
Manufactured in low-power  CMOS, the FE2011 is available  in a surface
mount 132-pin JEDEC Standard package.

***Versions:...
***Features:...
**FE3400/B      80286-Based AT Compatible CPU Core Logic (12 MHz) c:86...
**FE3500/B      80286-Based AT Compatible CPU Core Logic (12 MHz) c:87...
**FE3600/A/B/C  16/20MHz AT Chip set                              c:88...
**FE5300        CPU Core Logic for PS/2 Model 50/60 Compatibles   c:87...
**FE5400        CPU Core Logic for PS/2 Model 50/60 Compatibles   c:87...
**FE6500        CPU Core Logic for PS/2 Model 70/80 Compatibles   c:88...
**WD6400SX/LP   CPU Core Logic for PS/2 386SX Compatibles          <90...
**WD6500        CPU Core Logic for PS/2 386DX/486 Compatible       <90...
**WD7600A/LP/LV System Chip Set for 80286 or 80386SX         <11/25/91...
**WD7700/LP     System Chip Set for 80286 or 80386SX (Cache) <11/25/91...
**WD7855        System controller for 80386SX                <09/25/92...
**WD7900/LP/LV  System Chip Set for 80286 or 80386SX (Cache) <11/25/91...
**WD8110        System controller for 80386DX/486            <11/30/93...
**
**Support Chips:
**WD76C20x   Floppy, RTC, IDE and Support Logic Device       <11/25/91...
**WD76C30x   Perip. Ctrl, Interrupt Multiplex, and Clock Gen <11/18/91...
**WD7615     Desktop Buffer Manager                          <04/15/92...
**WD7625     Desktop Buffer Manager                          <10/01/92...
**WD8120LV   Super I/O [no datasheet]                                ?
**Other Chips:...
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