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**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
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**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



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**VL82C110 Combination I/O chip                                      ?
***Info:
The VL82C110  Combination I/O  chip replaces  several of  the commonly
used peripherals  found in  PC/AT-compatible computers.   The VL82C110
contains a 765A compatible floppy  disk controller with a digital data
clock separator, writ precompensation  logic and the necessary control
registers.  It also contains two 16C450 compatible UARTs, a Centronics
compatible printer port,  and an internal PMU  (power management unit)
which  is  useful  in  applications where  low  power  consumption  is
essential. Additionally,  a PLL clock  circuit is included  to provide
one of seven of the commonly used CPU clock frequencies.  This 100-pin
chip allows designers to implement a very cost-effective, minimum chip
count motherboard  containing functions  that are common  to virtually
all PCs.

The  internal  PMU provides  a  Sleep  output  which OS  asserted  via
automatically after a programmable time  delay period of inactivity in
any of the major on-chip  functions. Conversely, the sleep output will
be  de-asserted when  any activity  is detected  to any  of the  major
on-chip functions.

The on-chip UARTs are 100% software compatible with the VL16C450 ACE.

The bidirectional  parallel port  provides a PS/2  software compatible
interface between a Centronics-style  printer and the VL82C110. Direct
drive is  provided so that all  that is necessary to  interface to the
line  printer  is  a resistor-capacitor  network.   The  bidirectional
feature  (option)  is  software   programmable  for  backwards  PC/AT-
compatibility.

The  on-chip  disk  controller  OS  100% compatible  to  the  industry
standard  765A.  The  internal digital  data separator  is  capable of
operating up to  a 500 kb/s data rate.  The Controller also implements
all of the DP8473 disk controller functions.

The necessary signals  are provided to implement  the Integrated Drive
Electronics (IDE) interface.

A 24 MHz oscillator is included  for UART baud rate generation and the
floppy  disk  controller clock,  It  is  also  used to  generate,  via
software control, a 20, 25, 32, 40,  50, 66 or 80 MHz output which can
be used as a CPU input clock. This feature may be disabled at power-up
reset time.

Software  configurable registers  are provided  to enable  and disable
major blocks, assign addresses, and control other functions within the
VL82C110.

***Versions:...
***Features:...
**VL82C113 SCAMP  Combination I/O chip                               ?...
**VL82C114 Combination I/O chip                                      ?...
**Video: ...
**Disk:...
**Modems:...
**Other:...
**Not sure if they actually exist...
*Western Digital...
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*ZyMOS...
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