[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
**M1531/33/43 Aladdin IV & IV+ 50-83.3MHz <05/28/97
***Info:...
***Configurations:...
***Features:
****M1531 CPU-to-PCI bridge, Memory, Cache and Buffer Controller:
o Supports all Intel/Cyrix/AMD/TI/IBM 586 socket processors. Host
bus at 83.3MHz, 75MHz, 66 MHz, 60 MHz and 50MHz at 3.3V/2.5V.
- Supports linear wrap mode for Cyrix M1 & M2
- Supports Write Allocation feature for K6
- Supports Pseudo Synchronous PCI bus access
(CPU bus 75MHz - PCI bus 30MHz,
CPU bus 83.3MHz - PCI bus 33MHz)
o Supports Pipelined-Burst SRAM
- Direct mapped, 256KB/512KB/1MB
- Write-Back/Dynamic-Write-Back cache policy
- Built-in 8K*2 bit SRAM for MESI protocol to reduce cost and
enhance performance
- Cacheable memory up to 64MB with 8-bit Tag SRAM
- Cacheable memory up to 512MB with 11-bit Tag SRAM
- 3-1-1-1-1-1-1-1 for Pipelined Burst SRAM at back-to-back burst
read and write cycles.
- Supports 3.3V/5V SRAMs for Tag Address.
- Supports CPU Single Read Cycle L2 Allocation.
o Supports FPM/EDO/SDRAM DRAMs
- 8 RAS Lines up to 1GByte support
- 64-bit data path to Memory
- Symmetrical/Asymmetrical DRAMs
- 3.3V or 5V DRAMs
- Duplicated MA[1:0] driving pins for burst access
- No buffer needed for RASJ and CASJ and MA[1:0]
- CBR and RAS-only refresh for FPM
- CBR and RAS-only refresh and Extended refresh and self refresh
for EDO
- CBR and Self refresh for SDRAM
- 16 QWORD deep merging buffer for 3-1-1-1-1-1-1-1 posted write
cycle to enhance high speed CPU burst access
- 6-3-3-3-3-3-3-3 for back-to-back FPM read page hit
5-2-2-2-2-2-2-2 for back-to-back EDO read page hit
6-1-1-1-2-1-1-1 for back-to-back SDRAM read page hit
2-2-2-2 for retired data for posted write on FPM and EDO
page-hit
x-1-1-1 for retired data for posted write SDRAM page-hit
- Enhanced DRAM page miss performance
- Supports 64M-bit (16M*4, 8M*8, 4M*16) technology of DRAMs
- Supports Programmable-strength RAS/CAS/MWEJ/MA buffers.
- Supports Error Checking & Correction (ECC) and Parity for DRAM
- Supports the most flexible six 32-bit populated banks of DRAM to
support the most friendly DRAM upgrade ability [you can tell
marketing got a hold of this datasheet]
- Supports SIMM and DIMM
o Synchronous/Pseudo Synchronous 25/30/33MHz 3.3V/5V tolerance PCI
interface
- Concurrent PCI architecture
- PCI bus arbiter: five PCI masters and M1533/M1543 (ISA Bridge)
supported
- 6 DWORDs for CPU-to-PCI Memory write posted buffers
- Converts back-to-back CPU to PCI memory write to PCI burst cycle
- 38/22 DWORDs for PCI-to-DRAM Write-posted/Read-prefetching
buffers
- PCI-to-DRAM up to 133 MB/sec bandwidth (even when L1/L2
writeback)
- L1/L2 pipelined snoop ahead for PCI-to-DRAM cycle
- Supports PCI mechanism #1 only
- PCI spec. 2.1 support. (N(32/16/8)+8 rule, passive release, fair
arbitration)
- Enhanced performance for Memory-Read-Line and Memory-Read-
Multiple and Memory-write-Invalidate PCI commands.
o Enhanced Power Management
- ACPI support
- Supports PCI bus CLKRUN function
- Supports Dynamic Clock Stop
- Supports Power On Suspend
- Supports Suspend to Disk
- Supports Suspend to DRAM
- Self Refresh during Suspend
o 328-pin (27mmx27mm) BGA package
****M1533 PCI-to-ISA Bus Bridge:...
**M1541/42/33/43 Aladdin V & V+ 50-100MHz ?...
**M1561/43/35D Aladdin 7 ArtX [no datasheet, some info] 11/08/99...
**M6117 386SX Single Chip PC <97...
**
**Support Chips:
**M1535/D South Bridge ?...
**
**May not exist:...
**Later Chipsets:...
**Other:...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82395SX Smart Cache 12/17/90
***Notes:...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
**SL9030 Integrated Peripheral Controller <Jan90
***Info:...
***Versions:...
***Features:...
**SL9090/A Universal PC/AT Clock Chip <oct88...
**SL9095 Power Management Unit ?...
**SL9151 80286 Page Interleave Memory Controller (16-25MHz) ?...
**SL9250 80386SX Page Mode Memory Controller (16/20MHz 8MB) ?...
**SL9251 80386SX Page Interleave Memory Controller <04/13/90...
**SL9252 80386SX System and Memory Controller <06/12/90...
**SL9350 80386DX Page Mode Memory Controller (16-25MHz 16MB) ?...
**SL9351 80386DX Page Interleave Memory Controller (33MHz) ?...
**SL9352 80386DX System and Memory Controller <06/12/90...
**SLXXXX Other chips...
**
**VT82C470 "Jupiter", Chip Set (w/o cache) 386 [no datasheet] ?
**VT82C475 "Jupiter", Chip Set (w/cache) 386 [no datasheet] ?
**VT82C486/2/3 "GMC chipset" [no datasheet, some info] ?...
**VT82C495/480 "Venus" Chip Set [no datasheet] ?
**VT82C495/491 ? EISA Chip Set [no datasheet, some info] <93...
**VT82C496G Pluto, Green PC 80486 PCI/VL/ISA System <05/30/94...
**VT82C530MV 3.3V Pentium chipset [no datasheet, some info]<05/30/94...
**VT82C570M Apollo Master, Green Pentium/P54C <06/22/95...
**VT82C580VP Apollo VP, Pentium/M1/K5 PCI/ISA System <02/15/96...
**VT82C580VPX Apollo VPX, VPX/97, Pentium with 66/75MHz Bus <01/09/97...
**VT82C590 Apollo VP2, VP2/97, Single-Chip Pentium 66MHz <01/10/97...
**VT82C597/AT Apollo VP3, Single-Chip for Pentium with AGP <10/03/97...
**VT82C598MVP Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501 Apollo MVP4,Single-Chip 66-100MHz & AGP <11/04/98...
**VT82C680 Apollo P6, Pentium-Pro Chip Set <08/30/96...
**Support chips:
**VT82C505 Pentium/486 VL to PCI Bridge <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller <10/13/96...
**VT82C596/A Mobile PCI Integrated Peripheral Controller <11/05/97...
**VT82C686A/B PCI Super-I/O Integrated Peripheral Ctrl. <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
**Other...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
(c) Copyright mR_Slugs Warehouse - All rights Reserved