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**82C591/2  3/486                                               <Mar92
The BIOS companion. (Croucher, Phil) available here:
https://archive.org/details/pc_engineers_vol1_BIOS

Lists this as:
82C591/82C592 WriteBack

Also listed in:
ftp://ami.com/archive/Other_Manuals/!index.txt
"
CTQ3591.Z12     55546   03-17-92  386   Contaq 82c591 chipset  
CTQ4591.Z12     57510   03-17-92  486   Contaq 82c591 chipset  
CTQ591A.Z11    	84994   02-08-93  3/486 Contact 591-A chipset  
"

Indicating there is an A variant of the 82C591, the 82C591A.

**82C593    3/486 [no datasheet]                                <May92...
**82C596/A  3/486 Writeback Cache [no datasheet]             <11/11/92...
**??????    486 EISA chipset [no datasheet]                     <Feb93...
**82C599    PCI-VLB Bridge [no datasheet, some info]                 ?...
**82C693    PCI-ISA Bridge [no datasheet]                            ?...
*Efar Microsystems [no datasheets, some info]...
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**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**SL82C490   'Wagner' 486?              [no datasheet]               ?
***Notes:...
**SL82C550   'Rossini' Pentium          [no datasheet]            c:95
***Notes:
from:
http://www.os2forum.or.at/english/info/os2hardwareinfo/pci_chips.html

The Symphony  "Rossini" Chipset  (Symphony Labs:  10AD/4269) (9/13/95)
This is apparently a low-cost alternative to the Triton chipset, as it
operates  with up  to 66  MHz external  clock rates,  up to  two CPUs,
pipelined or non-pipelined, synchronous or [conventional] asynchronous
SRAM cache,  EDO RAM, and  does dual-port busmastering IDE.   It will,
apparently, adjust the voltages to  its various (CPU, PCI, cache, RAM)
buses  to suit  their requirements,  and will  control up  to six  PCI
masters.   It consists  of the  SL82C551 cache/memory  controller, the
SL82C522 data path controller, and the SL82C555 system I/O controller.

***Configurations:...
**
**Support Chips:
**SL82C365    Cache Controller (for 386DX/SX)                     c:91...
**SL82C465    Cache Controller (for 486/386DX/SX)                 c:91...
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