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**????? (Profusion) c:99
Chips:
Memory Access Controller (MAC)
Data Interface Buffer (DIB)
CPUs: 8x P-III Xeon Oct
DRAM Types: SDRAM PC100 2-way Interleave dual channel
Max Mem: 32GB
ECC/Parity: ECC
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3 PCI-66/64
**800 series...
*Headland/G2...
**HTK340 "Shasta" 486 Chip Set c:Jun92
***Notes:...
***Info:...
***Configurations:...
***Features:
o Support for 486SX/DX/DX2 CPU
o 2 - 184 pin PQFP devices
o Local bus interface
o 16, 20, 25 and 33MHz CPU speeds
o Fully static operation
o Weitek 4167 supported
o System and Video BIOS on single ROM
o Uses 0.7 Micron HCMOS process
ISA Controller
o AT Compatible
o Synchronized 8MHz ISA bus
o Posted backplane memory writes
o 10 or 16 bit l/O mapping
o Integrated 82375, 82593 and 8254 functionality
o Fast gate A20/Fast reset
Write Buffer
o 4 deep on-chip buffer
o Byte gathering
o Out of order operation
o Full or partial write buffer hits
DRAM Controller
o Line burst capability from DRAM to 80486
o 256K/1M/4M/16M DRAMs
o Mixed memory types
o EMS 4.0
o Hidden refresh operation
o 256MB Maximum system memory
o Staggered refresh
o Shadowing in 16KB increments between 640KB and 1MB
o Remapping
o Fast paging
o 2 or 4 way interleaving
**Support Chips:
**HT44 Secondary Cache c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
**SL82C360 'Haydn' 80386DX/SX chipset [no datasheet] c:Jun91
***Notes:...
***Configurations:...
**SL82C460 'Haydn II' 80486 chipset [no datasheet] c:Jun91...
**SL82C470 'Mozart' 486/386 EISA chipset c:Dec91...
**SL82C490 'Wagner' 486? [no datasheet] ?...
**SL82C550 'Rossini' Pentium [no datasheet] c:95...
**
**Support Chips:
**SL82C365 Cache Controller (for 386DX/SX) c:91...
**SL82C465 Cache Controller (for 486/386DX/SX) c:91...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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