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**Spelling errors/mistyped words
Yes, I  know there are  spelling errors,  and things are  mistyped. It
seems no matter  how hard I try  my fingers hit 't'  twice when typing
'compatible' rendering it 'compattible' numerous, (thousands actually)
times.  I  don't have the  time or the will  to check the  spelling of
everything. Basic spell checking has been peformed. Please let me know
if  there is  anything that  would lead  to incorrect  information, or
something  is so  mangled  that  it needs  revising.  But  if you  can
basically  understand  what was  intended,  just  cope with  it.  Just
cope:-)

BTW, "110" port is  an "I/O" port that has been OCRed  badly, as is an
"1/0" port.

**Info needed on:...
**A note on VESA support of 486 chipsets....
**Datasheets:...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82385SX     32-bit Cache Controller for 80386SX             01/25/89
***Notes:...
***Info:...
***Versions:...
***Features:
o   Improves 386 SX System Performance
    - Reduces Average CPU Wait States to Nearly Zero
    - Zero Wait State Read Hit
    - Zero Wait State Posted Memory Writes
    - Allows Other Masters to Access the System Bus More Readily
o   Hit Rates up to 99%
o   Optimized as 386 SX Companion
    - Simple 386 SX Interface
    - Part of Intel386-Based Compute Engine Including 387 SX Math 
      Coprocessor and 82370 Integrated System Peripheral
    - 16 MHz and 20 MHz Operation
o   Software Transparent
o   Synchronous Dual Bus Architecture
    - Bus Watching Maintains Cache Coherency
o   Maps Full 386 SX Address Space 
o   Flexible Cache Mapping Policies
    - Direct Mapped or 2-Way Set Associative Cache Organization
    - Supports Non-Cacheable Memory Space
    - Unified Cache for Code and Data
o   Integrates Cache Directory and Cache Management Logic
o   High Speed CHMOS Technology
    - 132-Pin PGA Package

**82395DX     High Performance Smart Cache                    06/18/90...
**82395SX     Smart Cache                                     12/17/90...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...