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**82420TX/ZX PCIset (for 486) TX (Saturn), ZX (Saturn II) c:Nov92
***Notes:
Date source: 82420 (nov92).pdf
Originally known as the 82420 chipset
Information taken from: 82420 (nov92).pdf
82420_PCIset_ISA_and_EISA_Bridges_Mar93.pdf
Intel_Peripheral_Components_1994.pdf*
82424ZX (nov94).pdf, 82420 (nov94).pdf
(Errata:1) http://support.intel.com/support/chipsets/420/8510.htm**
(Errata:2) http://support.intel.com/support/chipsets/420/8511.htm**
(Errata:3) http://support.intel.com/support/chipsets/420/8512.htm**
(Errata:4) http://support.intel.com/support/chipsets/420/8513.htm**
(Errata:5) http://support.intel.com/support/chipsets/420/apptech.htm**
>* General 82420 datasheet, 82423 and 82424 all dated Oct'93.
>** see archived sources at the end of this section
Differences:
Nov'92 to Mar'93:
The Mar'93 datasheet (Both only include the general section) has a
completely restructured Info and Features section. The main func-
tional difference is that in the Nov'92, no PCI-EISA bridge version
is available. The Mar'93 is the earliest datasheet found that
mentions the 82374/82375 EISA components.
Mar'93 to Oct'93:
The Mar'93 datasheet refers to the 82424TX component directly, the
Oct'93 to just 82424. Same with 82423TX and 82423. This is due to
the datasheet specifying both the TX and ZX variants of both chips.
A similar thing occurs with the 82378IB and 82378. In Oct'93 there
were IB and ZB variants. Other differences are shown in the text.
The Mar'93 source only includes the general section. In Oct'93, both
datasheets found for the specific chips are only short 1-2 pages
long.
In Errata:1, more specifics are given, that partially contradict the
Oct'93 datasheet. Dated Aug'93 the following differences are given:
"
82424TX * Name change from 82424TX to 82424ZX
Changes: * ZX eliminates all known TX errata
* Features/Enhancements include: Extra RAS line supports
additional memory, Optional memory locations for SMM,
external work-around logic for TX eliminated
Timing:
We anticipate production shipments...in October 1993 for the
82424ZX. "
Errata:2 gives further details. The document itself is undated, but
Errata:1 is hyperlinked to it. Its text is quoted in the Versions
section. Errata:3 & 4 go into further detail.
All Errata documents contradict the Oct'93 datasheet, by making no
mention of the 82423ZX variant.
Oct'93 to Nov'94:
In the Nov'94 datasheet specific variants are now referred to again.
All references to 82424 are replaced with 82424ZX, 82378 replaced
with 82378ZB. The 82423 is replaced with 82423TX again. It appears
the 82423ZX variant either no longer exists, or the Oct'93 datasheet
refers to a chip that was planned, but never introduced. As the
Oct'93 datasheet for the 82423 specific chip is only a part data-
sheet (1-2 pages), it has been impossible to determine what the
differences are between the ZX and TX variants, or even if the ZX
variant actually existed. It simply states there are differences.
The specific datasheet for the 82424 now only refers to the ZX
variant. the ZX-50 variant is not mentioned. Other changes between
the datasheets are shown in the text.
Errata:5 contains links to additional information, some related to
this chipset.
Archived sources:
http://web.archive.org/web/20000816013859/http://support.intel.com/support/chipsets/420/8510.htm
http://web.archive.org/web/20000816013854/http://support.intel.com/support/chipsets/420/8511.htm
http://web.archive.org/web/20000818162626/http://support.intel.com/support/chipsets/420/8512.htm
http://web.archive.org/web/20000818162634/http://support.intel.com/support/chipsets/420/8513.htm
http://web.archive.org/web/19990421055226/http://support.intel.com/support/chipsets/420/apptech.htm
***Info:...
***Versions:...
***Configurations:...
***Features:...
**82420EX PCIset (for 486) EX (Aries) (82425EX/82426EX) <Dec94...
**82430LX PCIset (Pentium) LX (Mercury) (82433LX/82434LX) 03/22/93...
**82430NX PCIset (Pentium) NX (Neptune) (82433NX/82434NX) Mar94...
**82430FX PCIset (Pentium) FX (Triton I) (82437FX/82438FX)01/31/95...
**82430MX PCIset (Pentium) MX (Mobile Triton)(82437/438MX)11/01/95...
**82430HX PCIset (Pentium) HX (Triton II) (82439HX) 02/12/96...
**82430VX PCIset (Pentium) VX (Triton II) (82437VX/82438) 02/12/96...
**82430TX PCIset (Pentium) TX (Triton II) (82439TX) 02/17/97...
**82450KX/GX PCIset (Pentium Pro) KX/GX (Mars/Orion) 11/01/95...
**
**Support Chips:
**82091AA Advanced Interface Peripheral (AIP) c93...
**8289 Bus Arbiter (808x) c79...
**82289 Bus Arbiter for iAPX 286 Processor Family c83...
**82258 Advanced Direct Memory Access Coprocessor(ADMA) 01/01/84...
**82335 High-Integration Interface Device For 386SX c:Nov88...
**82360SL I/O Subsystem 10/05/90...
**82370 Integrated System Peripheral (for 82376) c:Oct88...
**82371FB/SB PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
**82371MX Mobile PCI I/O IDE Xcelerator (MPIIX) 11/01/95...
**82371AB PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4) 02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB) c:Mar93...
**82378 System I/O (SIO) (82378IB and 82378ZB) c:Mar93...
**82379AB System I/O-APIC (SIO.A) <Dec94...
**82380 32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384 Clock Generator and Reset Interface c86...
**82385 32-bit Cache Controller for 80386 09/29/87...
**82385SX 32-bit Cache Controller for 80386SX 01/25/89...
**82395DX High Performance Smart Cache 06/18/90...
**82395SX Smart Cache 12/17/90...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90
***Notes:...
***Info:
The 82485 is a second-level cache controller designed to improve the
performance of Intel486 Microprocessor systems. One 82485 cache
controller supports 64K or 128K bytes of second level cache memory
that maps to the entire 4 Gigabytes of the Intel486 microprocessor
address space. The controller is completely software transparent. One
controller plus SRAMs provides a 64K or a 128K cache. External EPROM
can be cached yet remain write protected. The 82485 is fully
compatible with the Intel486 microprocessor. All Intel486 CPU bus
cycles and timings are supported.
A complete, optional second level cache controller using the 82485 is
available as the 485Turbocache Module from Intel (data sheet order
number 240722).
2.0 FUNCTIONAL DESCRIPTION
2.1 Introduction
The 82485 is a single ported, two-way set associative cache controller
designed specifically to interface with the Intel486 microprocessor.
The controller supports either a sectored configuration (two lines per
tag) or a non-sectored configuration (one line per tag). The 82485
will directly support a nonsectored 64K data cache or a 128K sectored
data cache. Both the 64K and 128K configurations are able to map the
entire 4 gigabytes of the Intel486 microprocessor address space. The
82485 interfaces directly to the Intel486 microprocessor. All Intel-
486 CPU bus cycles and timings are supported. The 82485 also supports
0 wait state processor operation when there is a cache hit and has
provisions to support invalidation cycles, BOFF# cycles, and premature
BLAST# terminations. The controller is look aside (monitors bus act-
ivity in parallel to the processor) and write through (all writes pro-
pagate to the system bus), so it supports the same cache consistency
mechanisms as the Intel486 CPU. The controller also provides a safe
method to cache ROM BIOS through the use of a write protect pin and a
write protect strapping option.
The data cache (Static RAM) resides external to the 82485. The 82485
provides all controls for the SRAMs. No external latches or tran-
ceivers are required. The 82485 output buffers support up to eight
SRAMs. A 64K cache can be designed with only five components; nine
components for a 128K cache. Two-way set associativity is provided by
dual banked SRAMs. Data parity is supported.
The 82485 can be used to design a custom second level cache
configuration. For an easier system design and higher integration, the
82485M Turbocache can be used (see data sheet order number 240722).
This module is a complete second level cache in one package. It
consists of a single 82485 cache controller and SRAM to provide a
complete 64K or 128K second level Intel486 microprocessor second level
cache.
***Versions:...
***Features:...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99
Chips:
Memory Access Controller (MAC)
Data Interface Buffer (DIB)
CPUs: 8x P-III Xeon Oct
DRAM Types: SDRAM PC100 2-way Interleave dual channel
Max Mem: 32GB
ECC/Parity: ECC
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3 PCI-66/64
**800 series...
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