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**Definition of a chip set:
In short it is a set of  chips that allow a system designer to build a
computer.  If we restrict the term  'chip' to that of a microchip then
technically any microcomputer  contains a chip set, even  one based of
7400-series logic alone.

In the context of this document, a chip set is defined as any group of
chips used to implement  an IBM or IBM-compatible PC/XT/AT/386/486/etc
system.

There are 2 main categories that these chips fall into:
1. Direct copies or re-implementations of Intel chips
2. Chip sets sold as a set of chips to implement an IBM-compatible 
   that differ in some way to those used in an IBM system, e.g. not 
   pin compatible.

An  example of  the former  would be  some early  chips built  by VLSI
Technology (at the time known as VTI, to implement a 286:
o  VL82C37A is a: 82C37A DMA controller
o  VL82C59A is a: 82C59A interrupt controller
o  VL82C54A is a: 82C54 timer
o  VL82C612 is a: 74LS612 memory mapper
o  VL82C84A is a: 82284 clock generator and ready interface
o  VL82C88  is a: 82288 bus controller

These are  all direct replacements  for the parts  used in an  IBM AT.
Many companies had compatible versions of these chips.

An early example of the latter is the Chips & Technology NEAT chip set:
o  82C211 CPU/Bus controller, 
o  82C212 Page/Interleave and EMS Memory controller, 
o  82C215 Data/Address buffer 
o  82C206 Integrated Peripherals Controller (IPC).

The description does not map directly to the parts used in the IBM AT.
Later chip sets are often even more integrated sometimes consisting of
just one chip, although two seems to be the most common.

The latter  is generally considered  the definition of a  chip set, and
the former is not generally  considered a chip set per-se. However when
looking  at   the  early  chip sets   this  distinction  can   be  very
slight. Because of this,  sets of chips  meeting the criteria  for (1.)
have been included where possible. 

**'chip set', 'chip-set' or 'chipset'?...
**What's not included:...
**Who made the first chip set?...
**Spelling errors/mistyped words...
**Info needed on:...
**A note on VESA support of 486 chipsets....
**Datasheets:...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
**HT18          80386SX Single Chip                            c:Sep91
***Info:
The HT18  is an advanced PC/AT compatible,  single-chip 80386SX design
solution. This  highly integrated single chip allows  simple, low cost
system  design options  while  featuring high  performance, low  power
consumption,  and minimum board  space requirements.   Advanced memory
management features  include support  for page mode,  with 2  or 4-way
interleaving  in both pipelined  and non-pipelined  modes(18A/B only).
Extended Hardware EMS  options include dual sets of  32 registers with
multiple context operation. Revisions A/B support 256K and 1M DRAMs in
1 by 1,  1 by 4, and 1  by 9 device configurations. Rev  C supports 4M
devices, as well.  A Shadow RAM  option for System Video BIOS and dual
or single system ROM BIOS support adds to overall design versatility.

A  complete PC/AT  compatible  system with  advanced  features may  be
implemented with minimal external support logic. The HT18 performs all
CPU  and peripheral support  functions in  a single  chip.  Integrated
device  functions include  DMA Controllers,  a Memory  Mapper, Timers,
Counters, Interrupt  Controllers, a Bus Controller  and all supporting
circuitry for PC core logic requirements. An asynchronous AT Bus clock
allows  for a  constant 8MHz  Bus clock  rate for  highest  bus device
compatibility as defined in IEEE Spec P996. This device is packaged in
a 208-pin  Plastic Quad Flat  Pack combining several  external buffers
into this space saving solution.

***Configurations:...
***Features:...
**HT21          386SX/286 Single Chip (20 MHz)                 c:Aug91...
**HT22          386SX/286 Single Chip (25 MHz)                 c:Sep91...
**HT25          3-volt Core Logic for 386SX                    c:Dec92...
**HT35          Single-Chip Peripheral Controller [partial info]     ?...
**HTK320        386DX Chip Set                                 c:Sep91...
**HTK340        "Shasta" 486 Chip Set                          c:Jun92...
**Support Chips:
**HT44          Secondary Cache                                c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...