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**Cant find a chip?
Early chip sets have a title and a part no. to refer to the chip set
as a whole. As time went on the chip set became one chip, so later
chip sets are usually referred to by the part no. on the actual chip.
These are usually called "Single Chip" by the manufacture, although
they nearly always follow the 2-chip North/South-bridge paradigm. So
these are referred to by for example, "M1521/M1523" or "M1521/M23" for
short. If there is a part number for the chip set as a whole that has
precedence. Try the search function for a chip part no. and hopefully
it will turn up the chip set it was part of.
**Why this document is not GPL or a wiki...
**Definition of a chip set:...
**'chip set', 'chip-set' or 'chipset'?...
**What's not included:...
**Who made the first chip set?...
**Spelling errors/mistyped words...
**Info needed on:...
**A note on VESA support of 486 chipsets....
**Datasheets:...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
**HT18 80386SX Single Chip c:Sep91
***Info:...
***Configurations:...
***Features:
o Highly Integrated, Single Chip 80386SX AT Compatible Solution
o Special Multiple Context Hardware EMS Support (LIM 4.0 compatible)
using 2 sets of 32 EMS Registers
o Single or Dual BIOS
o Shadow RAM support over entire C0000 to DFFFF Address range in 16K
increments, E0000 to FFFFF in 64K increments
o Page Mode and 2-way Interleaving
o Supports up to 12MHz AT Bus Clock
o High Performance Muxed DRAM Interleave
o Programmable DRAM timing
o Asynchronous AT Bus Clock
o Three-State Test Mode
o 16-Bit ROM BIOS Support
HT 18A/B Special Features
o 16 and 20 MHz CPU Clock Speeds
o Supports up to 8M CPU Memory using combinations of 64K, 256K and
1M Devices
o 4 Bank, 4-way Interleave Mode
HT18C/25MHz Special Features
o 16, 20 and 25MHz CPU Clock Speeds
o Supports up to 20M with EMS CPU Memory using combinations of 256K,
1M and 4M Devices
**HT21 386SX/286 Single Chip (20 MHz) c:Aug91...
**HT22 386SX/286 Single Chip (25 MHz) c:Sep91...
**HT25 3-volt Core Logic for 386SX c:Dec92...
**HT35 Single-Chip Peripheral Controller [partial info] ?...
**HTK320 386DX Chip Set c:Sep91...
**HTK340 "Shasta" 486 Chip Set c:Jun92...
**Support Chips:
**HT44 Secondary Cache c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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