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**82C206   Integrated Peripheral Controller                        c86
***Info:...
***Versions:...
***Features:
o   100% Compatible to IBM PC AT
o   Fully compatible to Intel's 8237 DMA controller, 8259 Interrupt 
    controller, 8254 Timer/Counter, and Motorola's 146818 Real Time 
    Clock
o   Offers 7 DMA channels, 13 Interrupt request channels, 2 Timer/
    Counter channels, and a Real Time Clock
o   Reduced recovery time (120 ns) between control
o   114 bytes of CMOS RAM memory
o   8 MHz DMA clock with programmable internal divider for 4 MHz 
    operation
o   Programmable wait states for the DMA cycle
o   16 Mbytes DMA address space
o   Single chip 84-pin CMOS implementation

**82C601/A Single Chip Peripheral Controller                 <08/30/90...
**82C607   Multifunction Controller                             <Jun88...
**82C710   Universal Peripheral Controller                     c:Aug90...
**82C711   Universal Peripheral Controller II                  c:Jan91...
**82C712   Universal Peripheral Controller II                  c:Jan91...
**82C721   Universal Peripheral Controller III                 c:May93...
**82C735   I/O Peripheral Controller With Printgine            c:Jul93...
**82C835   Single CHIP 386sx AT Cache Controller               c:Apr91...
**F87000   Multi-Mode Peripheral Chip                         11/23/93...
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**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:
Date source: 1995_Intel_Pentium_Processors_and_Related_Components.pdf

Information taken from: 
            1995_Intel_Pentium_Processors_and_Related_Components.pdf*
                                         8249x Cache controllers.pdf**
>*  Datasheet dated Nov'94
>** Datasheet undated, whole document dated '95

The info and features section have  been solely sourced from the first
source.   The  second source  provides  far  more detail.   Additional
information in  the configurations section  has been sourced  from the
second.

Difference to 82497/492 is this supports 1 Mbyte to 2 Mbyte cache.

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