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**A note on VESA support of 486 chipsets.
Many chipsets state  that they support VESA local  bus.  In some cases
these actually  implement VLB somewhat  like PCI, where it  is entirly
decoupled from the CPU bus. Chipsets  that do not state they work with
VLB,  may  be found  on  motherboards  that  contain VLB  slots.   VLB
is  *basically*  The 486  CPU  pinout in  a  slot  form. Unless  these
m/boards contain  some additional  chips, there VLB  implementation is
directly coupled to the CPU.

**Datasheets:...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92
***Notes:...
***Info:...
***Versions:...
***Features:...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W86C452   I/O controller for IBM PC/AT                         Jul89
***Info:
GENERAL DESCRIPTION

The W86C452 is an enhanced dual-channel version of the popular W86C450
asynchronous  communication element  (ACE) fabricated  using WINBOND'S
CMOS process.  It is  equivalent to VL160452  of the  VLSI Technology
Inc.

The  device   supports  two  serial-to-parallel   conversion  on  data
characters  received  from  a  peripheral  device  or  a  MODEM.   and
parallel-to-serial  conversion on  data characters  received  from the
CPU.

The CPU  can read the complete status  of the UART at  any time during
the  functional operation.  Status  information reported  includes the
type and condition  of the transfer operations being  performed by the
UART as  well as  any error conditions  (parity. overrun,  framing, or
break interrupt).

The UART includes  a programmable baud rate generator  that is capable
of dividing the timing reference clock input by divisors of l to (2^16
-1), and  producing a 16 x  clock for driving  the internal transmiter
logic. Provisions  are also included to  use this 16 x  clock to drive
the  receiver  logic.   The  UART includes  a  complete  MODEM-control
capability  and  a  processor-interrupt  system.   Interrupts  can  be
programmed  to  the  user’s  requirements,  minimizing  the  computing
required to handle the communications link.

In addition  to its communication interface  capabilities, the W86C452
provides the user with  a fully bidirectional parallel Centronics type
printer.  This part  allows  information received  from either  serial
communication port to be printed from the dual ACE.

***Versions:...
***Features:...
**W86C456   I/O controller [no datasheet]                            ?
**W860551/P UART with FIFO and Printer Port Controller             <94...
**
**Other:...
*ZyMOS...
*General Sources:...