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**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**82C750         Vendetta      [no datasheet]                        ?
***Notes:...
**82c801         SCWB2 DX Single Chip Solution                    c:92...
**82C802         SCWB2 PC/AT Single Chip [no datasheet]              ?...
**82C802G/GP     System/Power Management Controller (cached)      c:93...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
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**FE5300        CPU Core Logic for PS/2 Model 50/60 Compatibles   c:87
***Notes:...
***Info:
****General: ...
****FE5000 Peripheral and Control:...
****FE5010 DMA and Micro Channel Control logic:
As part  of the Faraday  FE5400 Chip Set,  the FE5010 DMA  and Channel
Control Logic integrated  circuit significantly facilitates the design
and  implementation of  IBM PS/2  Model  50 and  60 compatible  system
boards.   By combining  functionality normally  implemented 1n  2 gate
arrays  and  33  discrete  components,  the  FE5010  decreases  design
complexity,  saves space,  reduces system  cost, and  increases system
reliability.

The Extended  Setup Facility (ESF)  is a fully  compatible enhancement
that   allows   designers    to   provide   additional   functionality
(e. g. Winchester Controller,  LAN Adapter, Additional Serial Port) on
the system  board.  This  facility can help  reduce costs  and provide
system level product differentiation.   Figure 1 [see datasheet] shows
a typical system diagram using the FE5400 Chip Set.

****FE5020 Address and Data Buffer logic:...
***Configurations:...
***Features:...
**FE5400        CPU Core Logic for PS/2 Model 50/60 Compatibles   c:87...
**FE6500        CPU Core Logic for PS/2 Model 70/80 Compatibles   c:88...
**WD6400SX/LP   CPU Core Logic for PS/2 386SX Compatibles          <90...
**WD6500        CPU Core Logic for PS/2 386DX/486 Compatible       <90...
**WD7600A/LP/LV System Chip Set for 80286 or 80386SX         <11/25/91...
**WD7700/LP     System Chip Set for 80286 or 80386SX (Cache) <11/25/91...
**WD7855        System controller for 80386SX                <09/25/92...
**WD7900/LP/LV  System Chip Set for 80286 or 80386SX (Cache) <11/25/91...
**WD8110        System controller for 80386DX/486            <11/30/93...
**
**Support Chips:
**WD76C20x   Floppy, RTC, IDE and Support Logic Device       <11/25/91...
**WD76C30x   Perip. Ctrl, Interrupt Multiplex, and Clock Gen <11/18/91...
**WD7615     Desktop Buffer Manager                          <04/15/92...
**WD7625     Desktop Buffer Manager                          <10/01/92...
**WD8120LV   Super I/O [no datasheet]                                ?
**Other Chips:...
*Winbond...
*ZyMOS...
*General Sources:...