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*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
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*Forex . . . . . . [List only, no datasheets found]...
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**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



**800 series...
*Headland/G2...
**Notes:
InfoWorld Apr 10, 1989 p42 - Video Severn and G-2 Will Merge to form
Headland Technology.
...affiliate of LSI logic.

According to:
http://www.vgamuseum.info/index.php/news/itemlist/category/15-headland-technology

Graphics chips were renamed from  GC*** to HT***. In this document any
part no. that differs only by  GC/HT have been assumed to be a renamed
part.

**GC101/102     12/16MHz PC/AT Compatible Chip Set             c:Feb88...
**GC101/102/103 12/16MHz PC/AT Compatible Chip Set + EMS 4.0   c:Jul89...
**GCK113        80386 AT Compatible Chip Set                   c:oct89...
**GCK181        Universal PS/2 Chip Set                        c:Mar89...
**HT11          Single 286 AT Chip [no datasheet]               <Aug90...
**HT12/+/A      Single 286 AT Chip with EMS support            c:Aug90...
**HT18          80386SX Single Chip                            c:Sep91...
**HT21          386SX/286 Single Chip (20 MHz)                 c:Aug91...
**HT22          386SX/286 Single Chip (25 MHz)                 c:Sep91...
**HT25          3-volt Core Logic for 386SX                    c:Dec92...
**HT35          Single-Chip Peripheral Controller [partial info]     ?...
**HTK320        386DX Chip Set                                 c:Sep91...
**HTK340        "Shasta" 486 Chip Set                          c:Jun92...
**Support Chips:
**HT44          Secondary Cache                                c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
**VL82C312         SCAMP Power Management Unit (PMU)                 ?
***Info;...
***Versions:...
***Features:...
**VL82C315A        SCAMP II, Low-Power Notebook Chipset              ?...
**VL82C322A        SCAMP II, Power Management Unit (PMU)             ?...
**VL82C316         SCAMP II, PC/AT-Compatible System Controller      ?...
**VL82C323         SCAMP II, 5 Volt Power Management Unit (PMU)      ?...
**VL82C380         Single chip 386DX PC/AT Controller +on-chip cache ?...
**VL82C325             VL82C386SX System Cache controller            ?...
**VL82C335             VL82C386DX System Cache ctrl. [no d.sheet]    ?...
**VL82C315A/322A/3216  Kodiak 32-Bit Low-Voltage Chip Set            ?...
**VL82C420/144/146     SCAMP IV [no datasheet, some info]          c93...
**VL82C480         System/Cache/ISA bus Controller                   ?...
**VL82C481         System/Cache/ISA bus Controller                 c92...
**VL82C486         Single-Chip 486, SC486, Controller                ?...
**VL82C425         486 Cache controller                              ?...
**????????         Cheetah 486, PCI [no datasheet]                   ?...
**VL82C3216        Bus Expanding Controller Cache with write buffer  ?
***Info:
The VL82C3216 Bus Expanding  Controller (BANC) Cache with Write Buffer
is  specifically  designed  to  provide a  high-performance,  low-cost
solution for  interfacing 386SX  PC/AT-compatible chip sets  to 386DX,
Am386DXL,  AM386DXLV,  486DX,  486SX,  or compatible  processors.  The
designs  may   be  entirely  new  systems  or   upgrades  to  existing
ones. Power management features also make this device ideal for laptop
computers  or  other battery  operated  systems.   The performance  is
achieved  through the  use of  a write  buffer structure,  an external
second level cache, prediction algorithms, and maximizing the internal
first level cache of the i486, if used.

The  high  level of  integration  is  entered  on the  VL82C3216.   It
controls all  functions between the  host processor bus and  the 386SX
local  bus.   in  addition  the  the  write  buffer  and  second-  and
first-level  cache controls,  the  VL82C3216  contains prediction  and
burst mode algorithms that take full advantage of the page mode design
of existing 386SX  system architecture.  Through the  use of pipelined
page mode accesses to system memory,  the VL82C3216 bursts data to and
from memory at rates  of up to 25 MB per  second. This provides 32-bit
memory performance at 16-bit memory costs.
 
***Versions:...
***Features:...
**VL82C521/522     Lynx/M                                            ?...
**VL82C530         Eagle Ð                                         c95...
**VL82C541/543     Lynx                                            c95...
**VL82C591/593     SuperCore 590                                   c94...
**VL82C594/596/597 Wildcat                                         c95...
**I/O Chips:
**VL82C106 Combination I/O chip                                      ?...
**VL82C107 SCAMP  Combination I/O chip                               ?...
**VL82C108 TOPCAT Combination I/O chip                               ?...
**VL82C110 Combination I/O chip                                      ?...
**VL82C113 SCAMP  Combination I/O chip                               ?...
**VL82C114 Combination I/O chip                                      ?...
**Video: ...
**Disk:...
**Modems:...
**Other:...
**Not sure if they actually exist...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...