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**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
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*OPTi...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94
***Notes:...
***Info:
OPTi's  82C822 VESA  local bus  to PCI  Bridge (PCIB)  chip is  a high
integration  208-pin PQFP  device designed  to work  with VESA  VL bus
compatible core logic chipsets.  The 82C822 PCIB provides interface to
the high performance PCI bus and is fully compliant to the PCI Version
2.0 specification. The 82C822 requires  no glue logic to implement the
PCI  bus interface  and hence  it allows  designers to  have  a highly
integrated  motherboard with  both VESA  local bus  and PCI  local bus
support. The PCIB chip  offers premium performance and flexibility for
VESA VL-based desktop systems running up to 50MHz. The 82C822 PCIB can
be used with  OPTi's 82C802G core logic and  82C602 buffer chipsets to
build a  low cost and  power efficient 486-based desktop  solution. It
also works  with OPTi 82C546/547  chipset to build a  high performance
PCI/VL solution based on the Intel P54C processor.

The 82C822 PCIB provides all of the control, address and data paths to
access  the PCI  bus from  the  VESA Local  bus (VL  bus). The  82C822
provides  a  complete  solution  including data  buffering,  latching,
steering, arbitration, DMA and  master functions between the 32-bit VL
bus and the 32-bit PCI bus.

The PCIB works seamlessly with  the motherboard chipset bus arbiter to
handle all requests of the host  CPU and PCI bus masters, DMA masters,
I/O relocation  and refresh. Extensive register and  timer support are
designed into the 82C822 to implement the PCI specification.

The 82C822 is a  true VESA to PCI bridge. It  has the highest priority
on  CPU accesses  after cache  and system  memory. It  generates LDEV#
automatically  and  then  compares  the addresses  with  its  internal
registers to determine whether the current  cycle is a PCI cycle. When
a cycle  is identified  as PCI  cycle, the 82C822  will take  over the
cycle and then return RDY# to the CPU. If not, the 82C822 will give up
the  cycle to  the local  device  or, in  the  case of  an ISA  slave,
generate a  BOFF# cycle to the  CPU. This action will  abort the cycle
and allow the CPU to rerun the cycle.

The 82C822 includes  registers to determine shadow  memory space, hole
locations  and sizes  to allow  the 82C822  to determine  which memory
space should be local and which is located on the ISA bus. Upon access
to memory, the 82C822 can determine whether  or not the cycle is a PCI
access by comparing the cycle with its internal registers.

***Versions:...
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*UMC...
**UM82C***     (IBM/INTEL Direct replacement)                      c87
Note:  Dates vary  for when  these  chips were  first available.   Two
databooks have been used one from  '86 the other from '91. Not all the
chips  are  listed  in  the  '86  databook, the  date  of  '87  is  an
assumption.

PC/XT:
IBM:	      UMC:	  Desc:
Intel 8284    UM82C84A    25MHz CMOS Clock Generator and Driver
Intel 8288    UM82C88     Bus Controller
Intel 8259    UM8259A     Programmable Interrupt Controller also UM82C59A-2 (CMOS version)
Intel 8237    UM8237A     3-5MHz Programmable DMA Controller (DMAC)
Intel 8253    UM8253*2    2.6-5MHz Programmable Interval Timer
Intel 8255    UM82C55A*   Programmable Peripheral Interface

Note: *  indicates: possible  compatibility, datasheet does  not state
      explicitly. YMMV.

Note: *2  indicates:   The   UM8253   can   be   replaced   with   the
      UM82C54/-2. The datasheet says it is a superset of the 8253, and
      works up to 10MHz. Also it's compatible with the 8254.  AT: IBM:
      UMC: Desc: Intel 82284  UM82C284* 10-12.5MHz Clock Generator and
      Ready Interface Intel 82288  UM82C288* 10-12.5MHz Bus Controller
      Intel 8254  UM82C54/-2 8-10MHz CMOS Programmable  Interval Timer
      Intel  8259  UM8259A   Programmable  Interrupt  Controller  also
      UM82C59A-2 (CMOS version) Intel 8237 UM8237A 3-5MHz Programmable
      DMA Controller (DMAC) 74LS612 UM74HCT612* Memory Mapper MC146818
      RTC  UM82C6818* Real-Time  Clock (RTC)  Intel 8047  ??  Keyboard
      Controller

Note: *  indicates: possible  compatibility, datasheet does  not state
explicitly. YMMV.

**UM82C088     PC/XT Integration Chip                              <91...
**UM82C230     286AT MORTAR Chip Set                               <91...
**UM82C210     386SX/286 AT Chip Set                               <91...
**UM82C3xx     Twinstar & UM82C336F/N & UM82C39x [no datasheet]      ?...
**UM82C380     386 HEAT PC/AT Chip Set                             <91...
**UM82C480     386/486 PC Chip Set                                 c91...
**UM82C493/491 ??????????????? [no datasheet]                        ?...
**UM8498/8496  486 VL Chipset  "Super Energy Star Green"[no dsheet]c94...
**UM8881/8886  HB4 PCI Chipset "Super Energy Star Green"[no dsheet]c94...
**UM8890       Pentium chipset [no datasheet]                        ?...
**
**Support Chips:
**UM82152      Cache Controller (AUStek A38152 clone)              <91...
**UM82C852     Multi I/O For XT                                    <91...
**UM82C206     Integrated Peripheral Controller                    <91...
**UM82c45x     Serial/Parallel chips                                 ?...
**Other chips:...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

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