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**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:
Date source: 1995_Intel_Pentium_Processors_and_Related_Components.pdf

Information taken from: 
            1995_Intel_Pentium_Processors_and_Related_Components.pdf*
                                         8249x Cache controllers.pdf**
>*  Datasheet dated Nov'94
>** Datasheet undated, whole document dated '95

The info and features section have  been solely sourced from the first
source.   The  second source  provides  far  more detail.   Additional
information in the configurations section  and below have been sourced
from the second.

"Although the 82497 Cache Controller  is part of the Pentium processor
(735\90, 815\100, 1000\120, 1110\133) CPU-Cache Chip Set and the 82496
Cache  Controller is part  of the  Pentium Processor  (510\60, 567\66)
Chip  Set, the  two parts  are functionally  identical except  for the
differences noted in this section." - p491

Aside  from some  minor  differences in  pin  configuration, the  main
difference is the direct support  for 3.3V processors. This chipset is
still a 5V part. The cache operates at bus speed, max 66MHz.


This  chip was  used on  the Pentium  90MHz CPU  complexes of  Intel's
Xpress  platform.   Specifically  the BXCPUPENT90  (Single  90MHz,  16
82492s). Also found on IBM 9595/Server 500 Pentium 90MHz complexes.

***Info:...
***Configurations:...
***Features:...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
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**530/5595       (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98
***Info:...
***Configurations:...
***Features:...
**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99
***Info:...
***Versions:...
***Features:
o   Low Pin Count Interface
    - Comply with Intel LPC Interface Specification Rev. 1.0 
      (Sept. 29, 1997)
    - Supports Serial IRQ Protocol
    - Supports PCI PME# Interface
o   PC98/PC99, ACPI Compliant
    - PC98 & PC99 compliant
    - Register sets compatible with "Plug and Play ISA Specification 
      Rev. 1.0a"
    - ACPI V. 1.0 compliant
    - Supports 9 logical devices
o   Enhanced Hardware Monitor
    - Built-in 8-bit Analog to Digital Converter
    - 3 thermal inputs from remote thermistors or thermal diode or 
      diode-connected transistor
    - 8 voltage monitor inputs (VBAT is measured internally.)
    - WatchDog comparison of all monitored values
o   Fan Speed Controller
    - Provides Fan ON/OFF and PWM control
    - 3 programmable Pulse Width Modulation (PWM) Fan control outputs
    - Each PWM output supports 128 steps of PWM modes
    - Monitors 3 Fan tachometer inputs
o   Game Port
    - Built-in 558 quad timers and buffer chips
    - Supports direct connection of two joysticks
    - Game port signals are multiplexed with GPIOs
o   Two 16C550 UARTs
    - Supports two standard Serial ports
    - UART1 is dedicated for Serial port
    - UART2 supports  either Serial Port or IrDA 1.0/ASKIR
o   Consumer Remote Control (TV remote) IR with Power-up Feature
o   IEEE 1284 Parallel Port
    - Standard mode -- Bi-directional SPP compliant
    - Enhanced mode -- EPP V. 1.7 and 1.9 compliant
    - High speed mode -- ECP, IEEE 1284 compliant
    - Backdrive current reduction
    - Printer power-on damage reduction
    − Supports POST (Power-On Self Test) Data Port
o   Floppy Disk Controller
    - Supports two 360K/ 720K/ 1.2M/ 1.44M/ 2.88M floppy 
      disk drives
    - Enhanced digital data separator
    - 3-Mode drives supported
    - Supports automatic write protection via software
o   48 General Purpose I/O Pins
    - Input mode supports switch de-bounce
    - SMI is routed through GPIOs
o   Flash ROM Interface
    - Up to 4M bits flash supported
o   Single 24/48 MHz Clock Inputs
o   Single +5V Power Supply
o   128-Pin PQFP

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