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**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:...
***Info:...
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**
**Later chipsets (basic spec):
**440 series:
***440FX (Natoma)       05/06/96...
***440LX (Balboa)       08/27/97...
***440BX (Seattle)      c:Apr'98...
***440DX (?)            c:?...
***440EX (?)            c:Apr'98...
***440GX (Marlinespike) 06/29/98...
***440ZX & 440ZX-66 (?) 01/04/99...
***440ZX-M (?)          05/17/99...
***440MX (Banister)     05/17/99...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**5511/5512/5513 Pentium PCI/ISA                             <06/14/95
***Info:...
***Configurations:...
***Features:
****5511 PCI/ISA Cache Memory Controller (PCMC) ...
****5512 PCI Local Data Buffer (PLDB) ...
****5513 PCI System I/O (PSIO)
o   Integrated Bridge Between PCI Bus and ISA Bus
    - Translates PCI Bus Cycles into ISA Bus Cycles
    - Translates ISA Master or DMA Cycles into PCI Bus Cycles
    - Provides PCI-to-ISA Memory one DoubleWord Posted Write Buffer
o   Integrated ISA Bus Compatible Logic
    - ISA Bus Controller
    - ISA Arbiter for ISA Master, DMA Devices, and Refresh
    - Built-in Two 8237 Compatible DMA Controllers
    - Built-in Two 8259A Compatible Interrupt Controllers
    - Built-in One 8254 Timer
o   Supports Reroutibility of four PCI Interrupts to Any Unused IRQ 
    Interrupt
o   Supports Flash ROM
o   Built-in RTC with 256 Bytes CMOS SRAM
o   Built-in Keyboard Controller ( in the future)
o   Built-in PCI Master/Slave IDE Controller
    - Fully compatible with PCI Local Bus Specification V2.1
    - Supports PCI Bus Mastering
    - Plug and Play Compatible
    - Supports Scatter and Gather
    - Supports Dual Mode Operation, Native Mode and Compatible Mode
    - Supports IDE PIO Timing Mode 0, 1, 2 of ANSI ATA Specification
    - Supports Mode 3 and Mode 4 Timing Proposal on Enhanced IDE 
      Specification
    - Supports Multiword DMA Mode 0, 1, 2
    - Separate IDE Bus
    - Two 8x32-bit FIFO for PCI Burst Read/Write Transfers.
o   On-Board Plug and Play Port
    - Supports Two Steerable DMA Channels
    - Supports Two Steerable Interrupts
    - Supports One Programmable Chip Select
    - Supports DMA Type F Timing (in the future)
o   208-Pin PQFP
o   0.6 μm CMOS Technology

**5571           (Trinity) Pentium PCI/ISA Chipset (75MHz)   <12/09/96...
**5581/5582      (Jessie)  Pentium PCI/ISA Chipset (75MHz)   <04/15/97...
**5591/5592/5595 (David)   Pentium PCI A.G.P. Chipset        <01/09/98...
**5596/5513      (Genesis) Pentium PCI Chipset               <03/26/96...
**5597/5598      (Jedi)    Pentium PCI/ISA Chipset           <04/15/97...
**530/5595       (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
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