[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
**SL9010 System Controller (80286/80386SX/DX, 16/20/25MHz) <oct88
***Info:...
***Versions:...
***Features:...
**SL9020 Data Controller <oct88...
**SL9025 Address Controller <oct88...
**SL9090 Universal PC/AT Clock Chip <oct88...
**SL9250 Page Mode Memory Controller (16/20MHz 8MB Max) <oct88...
**SL9350 Page Mode Memory Controller (16/20/25MHz 16MB Max) <oct88...
**Other:...
*Motorola...
*OPTi...
**82C681/2/6/7 386/486WB EISA c:92
***Info:
****General:...
****82C681 (EBC) EISA Bus Controller:
The EISA Bus Controller (EBC) is a 160-pin PFP (Plastic Flat Package)
device capable of operation in both 386 and 486 mode. It generates the
EISA bus clock (BCLK) as well as the keyboard clock while also
providing board level and CPU/Coprocessor reset signals. In addition,
the EBC controls the interface between the EISA bus and the Host bus
and arbitrates between Host/ EISA/ISA Masters, DMA controllers, and
Refresh requests for the EISA bus. It directs the steering logic of
the DBC and the ISP and provides latch/buffer controls for
address/data byte lane translation/swapping. Additionally, it provides
the address translation between masters and slaves for addresses A20
and A[1:0].
****82C682 (MCC) Memory Cache Controller:...
****82C686 (ISP) Integrated System Peripheral:...
****82C687 (DBC) Data Bus Controller:...
***Configurations:...
***Features:...
**82C683 386/486AWB EISA [no datasheet] ?...
**82C693/6/7 Pentium uP Write Back Cache EISA c:93...
**82C700 FireStar c:97...
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
(c) Copyright mR_Slugs Warehouse - All rights Reserved