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**82378 System I/O (SIO) (82378IB and 82378ZB) c:Mar93
***Notes:...
***Info:
****All...
****Oct'93...
****Dec'94...
****All
1.0 ARCHITECTURAL OVERVIEW
The major functions of the SIO component are broken up into blocks as
shown in the preceding figure [see datasheet]. A description of each
block is provided below.
PCI Bus Interface:
The PCI Bus Interface provides the interface between the SIO and the
PCI bus. The SIO provides both a master and slave interface to the PCI
bus. As a PCI master, the SIO runs cycles on behalf of DMA, ISA
masters, and the internal data buffer management logic when buffer
flushing is required. The SIO will burst a maximum of two Dwords when
reading from PCI memory, and one Dword when writing to PCI memory. The
SIO does not generate PCI I/O cycles as a master. As a PCI slave, the
SIO accepts cycles initiated by PCI masters targeted for the SIO's
internal register set or the ISA bus. The SIO will accept a maximum of
one data transaction before terminating the transaction. This supports
the Incremental Latency Mechanism as defined in the Peripheral
Component Interconnect (PCI) Specification.
As a master, the SIO generates address and command signal (C/BE#)
parity for read and write cycles, and data parity for write cycles. As
a slave, the SIO generates data parity for read cycles. Parity
checking is not supported. The SIO also provides support for system
error reporting by generating a Non-Maskable-Interrupt (NMI) when
SERR# is driven active.
The SIO, as a resource, can be locked by any PCI master. In the
context of locked cycles, the entire SIO subsystem (including the ISA
bus) is considered a single resource.
The SIO directly supports the PCI Interface running at either 25 Mhz
or 33 Mhz. If a frequency of less than 33 Mhz is required (not
including 25 Mhz), a SYSCLK divisor value (as indicated in the ISA
Clock Divisor Register) must be selected that guarantees that the ISA
bus frequency does not violate the 6 Mhz to 8.33 Mhz SYSCLK range.
PCI Arbiter:
****Mar'93...
****Dec'94...
****All:...
***Versions:...
***Features:...
**82379AB System I/O-APIC (SIO.A) <Dec94...
**82380 32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384 Clock Generator and Reset Interface c86...
**82385 32-bit Cache Controller for 80386 09/29/87...
**82385SX 32-bit Cache Controller for 80386SX 01/25/89...
**82395DX High Performance Smart Cache 06/18/90...
**82395SX Smart Cache 12/17/90...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99
Chips:
Memory Access Controller (MAC)
Data Interface Buffer (DIB)
CPUs: 8x P-III Xeon Oct
DRAM Types: SDRAM PC100 2-way Interleave dual channel
Max Mem: 32GB
ECC/Parity: ECC
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3 PCI-66/64
**800 series
***810 (Whitney) 04/26/99...
***810L (Whitney) 04/26/99...
***810-DC100 (Whitney) 04/26/99...
***810e (Whitney) 09/27/99...
***810e2 (Whitney) 01/03/01...
***815 (Solano) 06/19/00...
***815e (Solano-2) 06/19/00...
***815em (Solano-?) 10/23/00...
***815ep (Solano-3) c:Nov'00...
***815p (Solano-3) c:Mar'01...
***815g (Solano-3) c:Sep'01...
***815eg (Solano-3) c:Sep'01...
***820 (Camino) 11/15/99...
***820e (Camino-2) 06/05/00...
***830M (Almador) 07/30/01...
***830MP (Almador) 07/30/01...
***830MG (Almador) 07/30/01...
***840 (Carmel) 10/25/99...
***845 (Brookdale) 09/10/01...
***845MP (Brookdale-M) 03/04/02...
***845MZ (Brookdale-M) 03/04/02...
***845E (Brookdale-E) 05/20/02...
***845G (Brookdale-G) 05/20/02...
***845GL (Brookdale-GL) 05/20/02...
***845GE (Brookdale-GE) 10/07/02...
***845PE (Brookdale-PE) 10/07/02...
***845GV (Brookdale-GV) 10/07/02...
***848P (Breeds Hill) c:Aug'03...
***850 (Tehama) 11/20/00...
***850E (Tehama-E) 05/06/02...
***852GM (Montara-GM) 01/14/03...
***852GMV (Montara-GM) ???...
***852PM (Montara-GM) 06/11/03...
***852GME (Montara-GM) 06/11/03...
***854 (?) 04/11/05...
***855GM (Montara-GM) 03/12/03...
***855GME (Montara-GM) 03/12/03...
***855PM (Odem) 03/12/03...
***860 (Colusa) 05/21/01...
***865G (Springdale) 05/21/03...
***865PE (Springdale-PE) 05/21/03...
***865P (Springdale-P) 05/21/03...
***865GV (Springdale-GV) c:Sep'03...
***875P (Canterwood) 04/14/03...
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