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**82420TX/ZX PCIset (for 486) TX (Saturn), ZX (Saturn II) c:Nov92
***Notes:...
***Info:...
***Versions:
Parts:
82424TX Cache DRAM Controller (CDC) c:nov92
82424ZX Cache DRAM Controller (CDC) c:oct93
82424ZX-50 Cache DRAM Controller (CDC) c:oct93 *
82423TX Data Path Unit (DPU) c:nov92
82423ZX Data Path Unit (DPU) c:oct93 **
>* the 82424ZX-50 variant is mentioned in the Oct'93 datasheet and
in Errata:3 it is known as the "Saturn II-50"
>** the 82423ZX variant is only mentioned in the oct93 datasheet
Later datasheets make no mention of them.
There are at least 4 revisions of this chipset. Rev 1, 2, 4 and 5. A
summary of the rev 1-4 can be found here:
http://www.os2forum.or.at/english/info/os2hardwareinfo/pci_chips.html
Archived:
https://web.archive.org/web/20040803185002/http://www.os2forum.or.at/english/info/os2hardwareinfo/pci_chips.html
Rev 5 is described in detail in Errata:3 and Errata:4.
****Errata:2 (Aug'93)
Preliminary White Paper--82424TX to 82424ZX
Errata Fix and Feature Enhancement
Conversion FOL933002-01
1. Name of Change
82424TX to 82424ZX errata fix and feature enhancement
2. Description of Change
Currently, the 82424TX is in production with the B-0 stepping
only. This component will be replaced by the 82424ZX, which is 100%
backwards compatible.
The 82424ZX eliminates all 82424TX errata, including: L1 Write Back
cache errata, errata affecting L2 cache operations and other errata
associated with the B-0 step. A complete listing of the 82424TX
errata may be found in the attached CDC/SIO B-0 Stepping
Information document.
In addition to the errata fixes, the 82424ZX provides several
feature enhancements to the 82420 PCIset. An additional RAS line is
provided which allows support for larger memory sizes. The 82424ZX
also provides optional memory locations for System Management Mode
(SMM) memory -- SMM will now be supported either on top of main
memory or below 1M. The B-0 components only support SMM memory
locations on top of main memory.
3. Reason for Change
The goal of the 82424ZX conversion is to eliminate all known issues
with the 82424TX B-0 step. In addition, the 82424ZX provides
several benefits to the customer:
A. All external glue required for work-around fixes are eliminated
(~ $5 worth)
B: L1 WB mode is supported for future Intel processors
C: Customers can now design systems which take advantage of SMM
codes which are mapped below 1M.
4. Products Affected
The 82424TX will be the only product affected by this change. All
customers will be required to convert to the 82424ZX.
5. Qualification/Certification Plan
82424TX quality and reliability results will be substituted to
achieve Level II for the new components. The 82424TX results are
enclosed in the attached 82420 & 82430 PCIset Quality and
Reliability report.
6. Timing
The 82424ZX step will begin sampling in August, 1993. Sample parts
will be marked 82424ZX Q185 and may be ordered through the local
Field Sales Office.
Limited production quantities will be available in October and will
be marked 82424ZX. The B-0 material will be phased out. All
customers are expected to have converted to the 82424ZX by late
December 1993.
***Configurations:...
***Features:...
**82420EX PCIset (for 486) EX (Aries) (82425EX/82426EX) <Dec94...
**82430LX PCIset (Pentium) LX (Mercury) (82433LX/82434LX) 03/22/93...
**82430NX PCIset (Pentium) NX (Neptune) (82433NX/82434NX) Mar94...
**82430FX PCIset (Pentium) FX (Triton I) (82437FX/82438FX)01/31/95...
**82430MX PCIset (Pentium) MX (Mobile Triton)(82437/438MX)11/01/95...
**82430HX PCIset (Pentium) HX (Triton II) (82439HX) 02/12/96...
**82430VX PCIset (Pentium) VX (Triton II) (82437VX/82438) 02/12/96...
**82430TX PCIset (Pentium) TX (Triton II) (82439TX) 02/17/97...
**82450KX/GX PCIset (Pentium Pro) KX/GX (Mars/Orion) 11/01/95...
**
**Support Chips:
**82091AA Advanced Interface Peripheral (AIP) c93...
**8289 Bus Arbiter (808x) c79...
**82289 Bus Arbiter for iAPX 286 Processor Family c83...
**82258 Advanced Direct Memory Access Coprocessor(ADMA) 01/01/84...
**82335 High-Integration Interface Device For 386SX c:Nov88...
**82360SL I/O Subsystem 10/05/90...
**82370 Integrated System Peripheral (for 82376) c:Oct88...
**82371FB/SB PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
**82371MX Mobile PCI I/O IDE Xcelerator (MPIIX) 11/01/95...
**82371AB PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4) 02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB) c:Mar93...
**82378 System I/O (SIO) (82378IB and 82378ZB) c:Mar93...
**82379AB System I/O-APIC (SIO.A) <Dec94...
**82380 32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384 Clock Generator and Reset Interface c86...
**82385 32-bit Cache Controller for 80386 09/29/87...
**82385SX 32-bit Cache Controller for 80386SX 01/25/89...
**82395DX High Performance Smart Cache 06/18/90...
**82395SX Smart Cache 12/17/90...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99
Chips:
Memory Access Controller (MAC)
Data Interface Buffer (DIB)
CPUs: 8x P-III Xeon Oct
DRAM Types: SDRAM PC100 2-way Interleave dual channel
Max Mem: 32GB
ECC/Parity: ECC
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3 PCI-66/64
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
**HMC82C206 Integrated Peripherals Controller (10MHz C&T 82c206) ?
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