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**82340DX Chip Set (VLSI) (82346/82345/82355) 01/08/90
***Notes:...
***Info:
****82346 System Controller:...
****82345 Data Buffer:...
****82344 ISA Bus Controller:
The 82344 ISA Bus Controller replaces several of the LSI controllers
used in PC/AT-type designs with one single 160-pin quad flatpack. The
Bus Controller provides the functions of DMA, page address register,
timer, interrupt control, Port B logic, slot bus refresh address
generation, and real time clock.
The Bus Controller directly drives the refresh addresses onto the AT
slot address bus during refresh cycles in response to a refresh cycle
command from the System Controller. To avoid problems with sensitive
slot bus add-in cards, the Bus Controller features "bus quiet"
mode. When no valid slot bus accesses are occurring, the SA bus and
control lines do not change states. Rather, they retain their previous
logic state.
Built-in sleep mode features work together with System Controller
sleep features to provide a low power system idle state for extension
of battery life in portable systems. When activated by the CPU via I/O
write to an internal indexed configuration register, the DMA subsystem
clock is stopped and the AT slot bus remains in BUS QUIET state. The
SYSCLK can be individually controlled. The interrupt controllers and
the timers continue to operate. If an interrupt occurs due to an
external source of any of the timers, the Bus Controller "wakes up"
and in turn wakes the System Controller.
The upgraded DMA channels provide a superset of AT functionality by
allowing DMA to the entire 64 Mbyte memory range of the 82340DX chip
set. Additional functionality is provided via DMA wait states, clock,
and -MEMR timing programmability.
A -HDRIVE pin can be externally strapped to provide for 12 mA or 24 mA
drive to the slot bus. If left open, an internal pull-up causes the
drive current to default to 24 mA. This allows systems designed with
one to four slots to select a lower drive level and reduce ringing. A
-ROM8 pin selects the bus and bus size to use for BIOS ROM accesses.
The choices are 8- or 16-bit wide ROMs.
A three-state test control pin has been added for board level
testability.
The Bus Controller features several megacells, implemented in 1.5-
micron CMOS technology, and is intended to work in 386 SX or 386 DX
microprocessor-based systems with CPU clock speeds up to 33MHz and bus
speeds up to 16 MHz.
***Configurations:...
***Features:...
**82340SX Chip Set (VLSI) (82343/82344) 01/25/89...
**82350 EISA Chip Set 07/10/89...
**82350DT EISA Chip Set 04/22/91...
**82420TX/ZX PCIset (for 486) TX (Saturn), ZX (Saturn II) c:Nov92...
**82420EX PCIset (for 486) EX (Aries) (82425EX/82426EX) <Dec94...
**82430LX PCIset (Pentium) LX (Mercury) (82433LX/82434LX) 03/22/93...
**82430NX PCIset (Pentium) NX (Neptune) (82433NX/82434NX) Mar94...
**82430FX PCIset (Pentium) FX (Triton I) (82437FX/82438FX)01/31/95...
**82430MX PCIset (Pentium) MX (Mobile Triton)(82437/438MX)11/01/95...
**82430HX PCIset (Pentium) HX (Triton II) (82439HX) 02/12/96...
**82430VX PCIset (Pentium) VX (Triton II) (82437VX/82438) 02/12/96...
**82430TX PCIset (Pentium) TX (Triton II) (82439TX) 02/17/97...
**82450KX/GX PCIset (Pentium Pro) KX/GX (Mars/Orion) 11/01/95...
**
**Support Chips:
**82091AA Advanced Interface Peripheral (AIP) c93...
**8289 Bus Arbiter (808x) c79...
**82289 Bus Arbiter for iAPX 286 Processor Family c83...
**82258 Advanced Direct Memory Access Coprocessor(ADMA) 01/01/84...
**82335 High-Integration Interface Device For 386SX c:Nov88...
**82360SL I/O Subsystem 10/05/90...
**82370 Integrated System Peripheral (for 82376) c:Oct88...
**82371FB/SB PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
**82371MX Mobile PCI I/O IDE Xcelerator (MPIIX) 11/01/95...
**82371AB PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4) 02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB) c:Mar93...
**82378 System I/O (SIO) (82378IB and 82378ZB) c:Mar93...
**82379AB System I/O-APIC (SIO.A) <Dec94...
**82380 32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384 Clock Generator and Reset Interface c86...
**82385 32-bit Cache Controller for 80386 09/29/87...
**82385SX 32-bit Cache Controller for 80386SX 01/25/89...
**82395DX High Performance Smart Cache 06/18/90...
**82395SX Smart Cache 12/17/90...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:
***440FX (Natoma) 05/06/96...
***440LX (Balboa) 08/27/97...
***440BX (Seattle) c:Apr'98...
***440DX (?) c:?...
***440EX (?) c:Apr'98...
***440GX (Marlinespike) 06/29/98...
***440ZX & 440ZX-66 (?) 01/04/99...
***440ZX-M (?) 05/17/99...
***440MX (Banister) 05/17/99...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
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