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**ET9000 "Jaguar" 486 Write Back Cache AT Single Chip <Jun92
***Info:
The JAGUAR single chip provides high integration and low cost solution
for a 16, 20, 25, 33 and 50MHz 486/AT based system design. Its
flexible architecture allows Direct Mapped Cache Implementation with
64KB/128KB/256KB/512KB Cache. The JAGUAR combined with 82C206 or
compatible peripheral controller offers a 100% PC/AT compatible system
using less than 12 components plus memory devices. The ET9000 is
available in the 184-pin Plastic Quad Flatpack package. The 1.0u high
speed, low power CMOS Technology allows for substantial stability when
running at 33 and 50MHz.
The JAGUAR includes 486 CPU control, write[back]-cache control, Page
Mode DRAM Control, a [local] DRAM control, AT Bus Control, Synchronous
AT Bus Clock Generation, Clock Switching Logic, data bus conversion
logic which performs the conversion necessary between the 8, 16 and
32-bit data paths. A Coprocessor Interface Logic to support Intel
487SX and Weitek 4167 are also included.
The JAGUAR ET9000 provides very flexible cache based system
implementation and a Page Mode DRAM memory to improve performance
during read miss cycles. System performance is further enhanced by
allowing Refresh and CPU cache hit cycles to occur concurrently
without holding the CPU during Refresh cycle.
The system cost is also minimized by allowing the use of slow SRAMs
and DRAMs. The "Write Back" cache is implemented to minimize DRAM
access time during write cycle.
The JAGUAR is designed to be 100% compatible with the IBM PC/AT. With
its optimized Cache and DRAM design, enhanced features like Shadow RAM
BIOS, and Concurrent Refresh; a high performance / low cost 486/ AT
can be implemented.
***Configurations:...
***Features:...
**ET9800/391 "Firefox" 386SX Write Back chipset [no datasheet] ?...
**82C390SX "Panda" S.C. 386SX Direct Mapped Cache [no d.sheet]cFeb92
***Notes:...
**66x8 VIA clones [no datasheet] ?...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**450NX (?) 06/29/98:
Chips:
[82454NX] (PXB) [82453NX] (MUX)
[82452NX] (RCG) [82451NX] (MIOC)
[82371EB] (PIIX4E),
CPUs: Single/Dual/Quad P-II Xeon/P-III Xeon
DRAM Types: FPM EDO 2-way Interleave 4-way Interleave
Mem Rows: 8
DRAM Density: 16Mbit 64Mbit
Max Mem: 8GB
ECC/Parity: Both
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
**SL9020 Data Controller <oct88
***Info:...
***Versions:...
***Features:...
**SL9025 Address Controller <oct88...
**SL9090 Universal PC/AT Clock Chip <oct88...
**SL9250 Page Mode Memory Controller (16/20MHz 8MB Max) <oct88...
**SL9350 Page Mode Memory Controller (16/20/25MHz 16MB Max) <oct88...
**Other:...
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