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*ETEQ...
**ET6000     "Cheetah" 486DX/SX Non-Cache System                <Apr92
***Info:
The  CHEETAH single  chip provides  high  integration and  a low  cost
solution  for  a  16,  20,  25,  33, and  50MHz  486/AT  based  system
design.  The CHEETAH  combined  with 82C206  or compatible  peripheral
controller offers  a 100% PC/AT  compatible system using less  than 10
components  plus  memory devices.  The  CHEETAH  is  available in  the
160-pin Plastic Quad Flat-pack package. The 1.0u high speed, low power
CMOS Technology  allows for substantial stability when  running at 25,
33, and 50MHz.

The CHEETAH includes  486 CPU control, AT Bus  Control, Page Mode DRAM
Control,  Asynchronous AT  Bus Clock  Generation, data  bus conversion
logic which performs the conversion necessary between the 8 and 16-bit
data paths, and Coprocessor Interface Logic to support Intel 487SX and
Weitek 4167.

The Cheetah  ET6000 is  a highly integrated  single chip  AT optimized
specifically for486 CPUs.  The emphasis of this chip  is to reduce the
cost   requirements   of   486  applications,   without   compromising
performance. Fast bursting can be achieved with 80ns DRAMs.

The  system  cost  is also  minimized  by  allowing  the use  of  slow
DRAMs. The  Burst Mode DRAM  control is implemented to  enhance system
performance.

The Cheetah is designed to be 100% compatible with the IBM PC/AT. With
its optimized Burst and DRAM design, enhanced features like Shadow RAM
BIOS, and  Concurrent Refresh; a high performance/low  cost 486/AT can
be implemented.

***Configurations:...
***Features:...
**ET9000     "Jaguar" 486 Write Back Cache AT Single Chip       <Jun92...
**ET9800/391 "Firefox" 386SX Write Back chipset [no datasheet]       ?...
**82C390SX   "Panda" S.C. 386SX Direct Mapped Cache [no d.sheet]cFeb92...
**66x8       VIA clones [no datasheet]                               ?...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



**800 series...
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*SIS...
*Symphony...
**SL82C490   'Wagner' 486?              [no datasheet]               ?
***Notes:...
**SL82C550   'Rossini' Pentium          [no datasheet]            c:95...
**
**Support Chips:
**SL82C365    Cache Controller (for 386DX/SX)                     c:91...
**SL82C465    Cache Controller (for 486/386DX/SX)                 c:91...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...