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**?????? 486 EISA chipset [no datasheet] <Feb93
PC Mag 23 Feb 1993 p124 -
Advert for DX2 66MHz EISA system, with Contaq chipset.
**82C599 PCI-VLB Bridge [no datasheet, some info] ?...
**82C693 PCI-ISA Bridge [no datasheet] ?...
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**82395SX Smart Cache 12/17/90
***Notes:
date source: TimelineDateSort7_05.pdf.
Also states: 82395SX (8-kilobyte); 82396SX (16-Kbyte); Extension of
386(TM) Smart cache architecture with two new versions of cache memory
controllers. Designed for 20-megahertz Intel386 SX microprocessor-
based systems
Could not find datasheet, see 82396SX, YMMV.
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
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**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
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**HMC82C206 Integrated Peripherals Controller (10MHz C&T 82c206) ?
***Info:...
***Versions:...
***Features
o Fully compatible to INTEL'S 8237 DMA controller, 8259 Interrupt
controller, 8254 timer/counter, and motorola's 146814 real time
clock
o Offers 7 DMA channels, 13 Interrupt request channels, 2 timer/
counter channels, and a real time clock
o 114 bytes of CMOS RAM memory
o 10MHz DMA clock with programmable internal divider for 5MHz
operation
o Programmable wait states for the DMA cycle
o 16 M bytes DMA address space
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