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**CS8221 NEW Enhanced AT (NEAT) (82C211/82C212/82C215/82C206) c86
***Info:
The CS8221 PC/AT compatible NEAT CHIPSet is an enhanced, high
performance 4 chip VLSI implementation (including the 82C206 IPC) of
the control logic used on the IBM Personal Computer AT. The flexible
architecture of the NEAT CHIPSet allows it to be used in any 80286
based system.
The CS8221 NEAT CHIPSet provides a complete 286 PC/AT compatible
system, requiring only 24 logic components plus memory devices.
The CS8221 NEAT CHIPSet consists of the 82C211 CPU/Bus controller, the
82C212 Page/interleave and EMS Memory controller. the 82C215
Data/Address buffer and the 82C206 Integrated Peripherals Controller
(IPC).
The NEAT CHIPSet supports the local CPU bus, a 16 bit system memory
bus, and the AT buses as shown in the NEAT System Block Diagram [see
datasheet]. The 82C211 provides synchronization and control signals
for all buses. The 82C211 also provides an independent AT bus clock
and allows for dynamic selection between the processor clock and the
user selectable AT bus clock. Command delays and wait states are
software configurable, providing flexibility for slow or fast peri-
pheral boards.
The 82C212 Page/interleave and EMS Memory controller provides an
interleaved memory sub-system design with page mode operation. It
supports up to 8 MB of on-board DRAM with combinations of 64Kbit,
256Kbit and 1Mbit DRAMs. The processor can operate at 16MHz with
0.5-0.7 wait state memory accesses, using 100 nsec DRAMs. This is
possible through the Page Interleaved memory scheme. The Shadow RAM
feature allows taster execution of code stored in EPROM, by down
loading code from EPROM to RAM. The RAM then shadows the EPROM for
further code execution. In a DOS environment, memory above 1Mb can be
treated as LIM EMS memory.
The 82C215 Data/Address buffer provides the buffering and latching
between the local CPU address bus and the Peripheral address bus. It
also provides buffering between the local CPU data bus and the memory
data bus. The parity bit generation and error detection logic resides
in the 82C215.
The 82C206 Integrated Peripherals Controller is an integral part of
the NEAT CHIPSet. It is described in the 82C206 Integrated Peri-
pherals Controller data book.
System Overview
The CS8221 NEAT CHIPSet is designed for use in 12 to 16 MHz 80286
based systems and provides complete support for the IBM PC/AT
bus. There are four buses supported by the CS8221 NEAT CHIPSet as
shown in Figure 1 [see datasheet]: CPU local bus (A and D), system
memory bus (MA and MD), I/O channel bus (SA and SD), and X bus (XA and
XD). The system memory bus is used to interface the CPU to the DRAMs
and EPROMs controlled by the 82C212. The I/O channel bus refers to
the bus supporting the AT bus adapters which could be either 8 bit or
16 bit devices. The X bus refers to the peripheral bus to which the
82C206 IPC and other peripherals are attached in an IBM PC/AT.
***Configurations:...
***Features:...
**CS8223 LeAPset [no datasheet] ?
**CS8225 CHIPS/250 PS/2 50/60 [no datasheet, some info] c88...
**CS8227 CHIPSlite (82C235/82C641) ?...
**CS8230 386/AT (82C301/302/303/304/305/306)cFeb87...
**CS8231 TURBO CACHE-BASED 386/AT (82C301/307/303/304/305/306) c86...
**CS8232 CMOS 386/AT (82C301/302/303/304/305/306) c86...
**CS8233 PEAK/386 AT (Cached) (82C311/82C315/82C316) c:Dec90...
**CS8236 386/AT (82C301/2/3/4/5/6/206) c86...
**CS8237 TURBO CACHE-BASED 386/AT (82C301/7/3/4/5/6/206) c86...
**CS8238 CHIPS/280 & 281 (386 MCA)(82C321/322/325/223/226) c:Aug89...
**CS82310 PEAK/DM 386 AT (82C351/82C355/82C356) c91...
**CS8281 NEATsx (386SX) (82C811/812/215/206) c:Dec89...
**CS8283 LeAPset-sx (82C841/82C242/82C636) c:Mar90...
**CS8285 PEAKsx (82C836/82C835) c91...
**CS8288 CHIPSlite-sx (82C836/82C641/82C835) c?...
**CS4000 WinCHIPS (64200/84021/84025) c92...
**CS4021 ISA/486 (84021/84025) c92...
**CS4031 CHIPSet (84031/84035) 5/10/93...
**CS4041/5 CHIPSet (84041/84045) 2/10/95...
**CB8291 ELEAT [no datasheet] c90...
**CB8295 ELEATsx [no datasheet] c90...
**82C100 IBM PS/2 Model 30/Super XT ?...
**82C110 IBM PS/2 Model 30/Super XT ?...
**82C235 Single Chip AT (SCAT) c89...
**82C836 Single Chip 386sx (SCATsx) <91...
**F8680/A PC/CHIP Single-Chip PC c93...
**
**Support Chips:
**64200 (Wingine) High Performance 'Windows Engine' c:Oct91...
**82C206 Integrated Peripheral Controller c86...
**82C601/A Single Chip Peripheral Controller <08/30/90...
**82C607 Multifunction Controller <Jun88...
**82C710 Universal Peripheral Controller c:Aug90...
**82C711 Universal Peripheral Controller II c:Jan91...
**82C712 Universal Peripheral Controller II c:Jan91...
**82C721 Universal Peripheral Controller III c:May93...
**82C735 I/O Peripheral Controller With Printgine c:Jul93...
**82C835 Single CHIP 386sx AT Cache Controller c:Apr91...
**F87000 Multi-Mode Peripheral Chip 11/23/93...
**Other:...
**Disk:...
**Video:
F64300 Wingine DGX 2MB, (appears to be a VLB version adapted from the proprietary 64200)
F64310 Wingine DGX 2MB (appears to be a PCI version adapted from the proprietary 64200)
OC65540 VGA BIOS c:95
OC65545 VGA BIOS same as 540 but has hardware overlay feature.
94C2001 PUMA (Programmable Universal Micro Accelerator) 50MHz Video accelerator
82C840 8514/A clone
82C9001A Video controller
82C404 Programmable clock synthesizer
82C402 VGA clock Synthesizer
82C411 Flat panel color pallet/DAC
82C425 82C425 CGA, CRT+LCD support, greyscale on LCD, supports two softfonts (up to 8x16 pixels) allowing 512 characters on screen, no snow
82C426 82C426 CGA, CRT, color LCD+AT&T400 support, max 32KB RAM
82C450 82C450 1MB VRAM, max 800x600 256color
82C451 82C451 VGA 256KB DRAM, max 800x600 16color c:90
82C452 82C452 1MB DRAM, max 640x480 256color, 1024x768 16color
82C453 82C453 1MB DRAM, max 800x600 256color
82C455 82C455 256KB DRAM Flat Panel version
82C456, 456A 82C456 256KB DRAM Flat Panel/CRT
82C457 82C457 Full color
82C45x series are VGA
'The 655xx series chips are SVGA video controller chips for flat panel
displays and CRTs. They also provide some level of CGA, MDA, EGA, and
Hercules compatibility, and various accelerator features. They are
designed with various features for reducing power consumption and
optimizing display quality.
source:http://www.igl.ku.dk/~fsp/varia/ct5xx.html
see the above source for more details.
82C481 True-Color Graphics Accelerator Wingine?
F65510 65510 LCD / CRT
F65520 65520 1MB D/VRAM, Full color, max 1280x1024 16color & 800x600 256 color
F65525 65525 LCD / CRT
F65530 65530 1MB D/VRAM, Full color, max 1280x1024 16color & 800x600 256 color, VLB
F65535 65535 LCD / CRT
F65540 65540 same as 65545 but without BitBLT and hw cursor
F65545 65545 mobile, 512-1024KB DRAM, ISA / PCI / VLB
65546 65546
F65548 65548
F65550 65550 HighQV32, mobile, 1-2MB DRAM, PCI / VLB
B65554 65554 HighQV64, mobile, 1-4MB DRAM, BGA
F65555 65555 HighQVPro, mobile, 1-4MB EDO, BGA
F68554 68554 HiQVision
F68555 68555
F69000 69000
M69000 69000 HighQVideo, mobile, 83MHz RAM, 2MB SDRAM on die, PCI / AGPx1, 135MHz RAMDAC, BGA, MiniBGA
F69030 69030 HighQVideo, mobile, 100MHz RAM, 4MB SDRAM on die, PCI / AGPx1, 170MHz RAMDAC, BGA, MiniBGA
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82489DX Advanced Programmable Interrupt Controller 10/12/92
***Notes:...
***Info:...
***Versions:...
***Features:...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
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