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**M1541/42/33/43 Aladdin V & V+    50-100MHz                         ?
***Info:...
***Configurations:...
***Features:
****M1541/1542 AGP/CPU-to-PCI bridge/Memory/Cache and Buffer Ctrl.:
[The datasheet has some  features shaded. These are represented below]
[by features enclosed in [].  The datasheet does not explicitly state]
[these features only apply to the M1542, and are absent in the M1541.]
[However this is the most likely reason they are shaded.             ]

o   Supports all Socket 7 processors. Host bus at 100MHz, 83.3MHz, 
    75MHz, 66 MHz, 60 MHz and 50MHz at 3.3V/2.5V.
    - Supports linear wrap mode for Cyrix M1 & M2
    - Supports Write Allocation feature for K6
    - Supports Pseudo Synchronous AGP and PCI bus access
      (CPU bus 75MHz   - AGP bus 60MHz, PCI bus 30MHz,
       CPU bus 83.3MHz - AGP bus 66MHz, PCI bus 33MHz,
       CPU bus 100MHz  - AGP bus 66MHz, PCI bus 33MHz)
o   Supports Pipelined-Burst SRAM/Memory Cache
    - Direct mapped, 256KB/512KB/1MB
    - Write-Back/Dynamic-Write-Back cache policy
    - Built-in 16K*2 bit SRAM for MESI protocol to reduce cost and 
      enhance performance
   [- Built-in 16K*10 bit SRAM for TAG data to reduce cost and ]
   [  enhance performance (reserved)                           ]
    - Cacheable memory up to 128MB with 8-bit Tag SRAM when using 
      512KB L2 cache, 256MB when using 256KB L2 cache.
    - Cacheable memory up to 512MB with 10-bit Tag SRAM when using 
      512KB L2 cache, 1GB when using 256KB L2 cache
    - 3-1-1-1-1-1-1-1 for Pipelined Burst SRAM/ Memory Cache at 
      back-to-back burst read and write cycles.
    - Supports 3.3V/5V SRAMs for Tag Address.
    - Supports CPU Single Read Cycle L2 Allocation.
o   Supports FPM/EDO/SDRAM DRAMs
    - 8 RAS Lines up to 4G Byte support
    - 64-bit data path to Memory
    - Symmetrical/Asymmetrical DRAMs
    - 3.3V or 5V DRAMs
    - No buffer needed for RASJ and CASJ and MA
    - CBR and RAS-only refresh for FPM
    - CBR and RAS-only refresh and Extended refresh and self refresh 
      for EDO
    - CBR and Self refresh for SDRAM
    - 32 QWORD deep merging buffer for 3-1-1-1-1-1-1-1 posted write 
      cycle to enhance high speed CPU burst access
    - 6-3-3-3-3-3-3-3 for back-to-back FPM read page hit
      5-2-2-2-2-2-2-2 for back-to-back EDO read page hit
      6-1-1-1-1-1-1-1 for back-to-back SDRAM read page hit
      X-2-2-2-2-2-2-2 for retired data for posted write on FPM and 
      EDO page-hit
      X-1-1-1-1-1-1-1 for retired data for posted write SDRAM page-hit
    - Supports SDRAM internal bank operation
    - Enhanced DRAM page miss performance
    - Supports 64, 128, 256M-bit technology of DRAMs
    - Supports Programmable-strength CAS//MA buffers.
    - Supports Error Checking & Correction (ECC
   [  at or below 83.3 MHz only) and Parity for DRAM  ]
    - Supports 4 single-sided DIMMs based on x4 DRAMs
    - Supports 4 single and double-sided DIMMs based on x8 and x16 
      DRAMs
    - Supports 4 single-sided registered DIMMs based on 4 bits data 
      width SDRAM
o   Synchronous/Pseudo Synchronous 25/30/33MHz 3.3V/5V tolerance PCI 
    interface
    - Concurrent PCI architecture
    - PCI bus arbiter: Five PCI masters and M1533/M1543 (ISA Bridge) 
      and AGP Master supported
    - 6 DWORDs for CPU-to-PCI Memory write posted buffers
    - Converts back-to-back CPU to PCI memory write to PCI burst cycle
    - 80/22 DWORDs for PCI-to-DRAM Write-posted/Read-prefetching 
      buffers
    - PCI-to-DRAM up to 133 MB/sec bandwidth (even when L1/L2 write 
      back)
    - L1/L2 pipelined snoop ahead for PCI-to-DRAM cycle
    - Supports PCI mechanism #1 only
    - PCI spec. 2.1 support. (N(32/16/8)+8 rule, passive release, fair
      arbitration)
    - Enhanced performance for Memory-Read-Line and Memory-Read-
      Multiple and Memory-write-Invalidate PCI commands.
o   Enhanced Power Management
    - ACPI support
    - Supports PCI bus CLKRUN function
    - Supports Dynamic Clock Stop
    - Supports Power On Suspend
    - Supports Suspend to Disk
    - Supports Suspend to DRAM
    - Self Refresh during Suspend
o   Accelerated Graphics Port (AGP) Interface
    - Supports AGP specification V1.0
    - Supports up to 64 entries table look aside buffer for Graphic 
      Address Remapping Table (GART)
    - AGP 66MHz protocol
    - AGP 1X and 2X sideband address function
    - 28 entries Request queue
    - 32 QWORDs Read buffer
    - 16 QWORDs Write buffer
o   35x35 mm 456-pin BGA package

****M1543/C    PCI-to-ISA Bus Bridge with Super I/O & Fast IR:...
**M1561/43/35D   Aladdin 7 ArtX    [no datasheet, some info]  11/08/99...
**M6117          386SX Single Chip PC                              <97...
**
**Support Chips:
**M1535/D        South Bridge                                        ?...
**
**May not exist:...
**Later Chipsets:...
**Other:...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
**Video:
F64300 	Wingine DGX 2MB, (appears to be a VLB version adapted from the proprietary 64200)
F64310 	Wingine DGX 2MB  (appears to be a PCI version adapted from the proprietary 64200)

OC65540   VGA BIOS  c:95
OC65545   VGA BIOS same as 540 but has hardware overlay feature.

94C2001   PUMA (Programmable Universal Micro Accelerator) 50MHz Video accelerator

82C840 	  8514/A clone
82C9001A  Video controller

82C404          Programmable clock synthesizer
82C402 	  	VGA clock Synthesizer
82C411          Flat panel color pallet/DAC

82C425 	  	82C425 	CGA, CRT+LCD support, greyscale on LCD, supports two softfonts (up to 8x16 pixels) allowing 512 characters on screen, no snow
82C426 	  	82C426 	CGA, CRT, color LCD+AT&T400 support, max 32KB RAM
82C450 	  	82C450 	1MB VRAM, max 800x600 256color
82C451 	  	82C451 	VGA 256KB DRAM, max 800x600 16color c:90
82C452 	  	82C452 	1MB DRAM, max 640x480 256color, 1024x768 16color
82C453 	  	82C453 	1MB DRAM, max 800x600 256color
82C455 	  	82C455 	256KB DRAM Flat Panel version
82C456, 456A  	82C456 	256KB DRAM Flat Panel/CRT
82C457 	  	82C457 	Full color

82C45x series are VGA

'The 655xx series chips are SVGA video controller chips for flat panel
displays and CRTs. They also provide  some level of CGA, MDA, EGA, and
Hercules  compatibility, and  various accelerator  features. They  are
designed  with various  features  for reducing  power consumption  and
optimizing display quality. 
source:http://www.igl.ku.dk/~fsp/varia/ct5xx.html

see the above source for more details.

82C481 True-Color Graphics Accelerator Wingine?

F65510 	65510 	LCD / CRT
F65520 	65520 	1MB D/VRAM, Full color, max 1280x1024 16color & 800x600 256 color
F65525 	65525 	LCD / CRT
F65530 	65530 	1MB D/VRAM, Full color, max 1280x1024 16color & 800x600 256 color, VLB
F65535 	65535 	LCD / CRT
F65540 	65540 	same as 65545 but without BitBLT and hw cursor
F65545 	65545 	mobile, 512-1024KB DRAM, ISA / PCI / VLB
65546 	  	65546 	 
F65548 	65548 	 
F65550 	65550 	HighQV32, mobile, 1-2MB DRAM, PCI / VLB
B65554 	65554 	HighQV64, mobile, 1-4MB DRAM, BGA
F65555 	65555 	HighQVPro, mobile, 1-4MB EDO, BGA
F68554 	68554 	HiQVision
F68555 	68555 	 
F69000  69000 	
M69000 	69000 	HighQVideo, mobile, 83MHz RAM, 2MB SDRAM on die, PCI / AGPx1, 135MHz RAMDAC, BGA, MiniBGA
F69030 	69030 	HighQVideo, mobile, 100MHz RAM, 4MB SDRAM on die, PCI / AGPx1, 170MHz RAMDAC, BGA, MiniBGA


*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**800 series
***810         (Whitney)       04/26/99...
***810L        (Whitney)       04/26/99...
***810-DC100   (Whitney)       04/26/99...
***810e        (Whitney)       09/27/99...
***810e2       (Whitney)       01/03/01...
***815         (Solano)        06/19/00...
***815e        (Solano-2)      06/19/00...
***815em       (Solano-?)      10/23/00...
***815ep       (Solano-3)      c:Nov'00...
***815p        (Solano-3)      c:Mar'01...
***815g        (Solano-3)      c:Sep'01...
***815eg       (Solano-3)      c:Sep'01...
***820         (Camino)        11/15/99...
***820e        (Camino-2)      06/05/00...
***830M        (Almador)       07/30/01...
***830MP       (Almador)       07/30/01...
***830MG       (Almador)       07/30/01...
***840         (Carmel)        10/25/99...
***845         (Brookdale)     09/10/01...
***845MP       (Brookdale-M)   03/04/02...
***845MZ       (Brookdale-M)   03/04/02...
***845E        (Brookdale-E)   05/20/02...
***845G        (Brookdale-G)   05/20/02...
***845GL       (Brookdale-GL)  05/20/02...
***845GE       (Brookdale-GE)  10/07/02...
***845PE       (Brookdale-PE)  10/07/02...
***845GV       (Brookdale-GV)  10/07/02...
***848P        (Breeds Hill)   c:Aug'03...
***850         (Tehama)        11/20/00...
***850E        (Tehama-E)      05/06/02...
***852GM       (Montara-GM)    01/14/03...
***852GMV      (Montara-GM)    ???...
***852PM       (Montara-GM)    06/11/03...
***852GME      (Montara-GM)    06/11/03...
***854         (?)             04/11/05...
***855GM       (Montara-GM)    03/12/03...
***855GME      (Montara-GM)    03/12/03...
***855PM       (Odem)          03/12/03...
***860         (Colusa)        05/21/01...
***865G        (Springdale)    05/21/03...
***865PE       (Springdale-PE) 05/21/03...
***865P        (Springdale-P)  05/21/03...
***865GV       (Springdale-GV) c:Sep'03...
***875P        (Canterwood)    04/14/03...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

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