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*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
**82C601/A Single Chip Peripheral Controller                 <08/30/90
***Notes:...
***Info:...
***Versions:...
***Features:...
**82C607   Multifunction Controller                             <Jun88...
**82C710   Universal Peripheral Controller                     c:Aug90...
**82C711   Universal Peripheral Controller II                  c:Jan91...
**82C712   Universal Peripheral Controller II                  c:Jan91...
**82C721   Universal Peripheral Controller III                 c:May93...
**82C735   I/O Peripheral Controller With Printgine            c:Jul93...
**82C835   Single CHIP 386sx AT Cache Controller               c:Apr91...
**F87000   Multi-Mode Peripheral Chip                         11/23/93
***Info:...
***Versions:...
***Features:
o   Fully static design substantially reduces power consumption when 
    compared to discrete TTL designs, allowing direct battery drive.
o   3.3V or 5V operation provides flexibility for system design and 
    allows dynamic 3.3/5V switching of system voltage to further 
    reduce power consumption.
o   Each F8700 device can be strapped to configure one of three 
    buffer modes or a multi-function mode, reducing parts inventory 
    requirements.
o   High integration means each F8700 mode replaces at least seven 
    discrete TTL devices.
o   Full isolation of PCMCIA memory and I/O cards is supported to 
    allow safe insertion and removal of cards, both "hot" and "cold."
o   PCMCIA buffer modes are completely PCMCIA 2.0-compatible.
o   For single PCMCIA card support, Mode 1 buffers 20 address lines 
    and 5 control lines.  Because of the quiet bus design of PC/CHIPm 
    the upper address lines can be connected directly to the PCMCIA 
    card slot in a single card system for full 64MB support.
o   For dual PCMCIA card support, Modes 2 and 3 together buffer all 
    necessary address and control lines for independent 64MB support 
    of each card.
o   Between PCMCIA cycles, the F87000 sets PCMCIA buses and control 
    lines to a low-power state to consume only a fraction of the power 
    used in a standard TTL buffer design.
o   Multi-function mode (Mode 4) provides keyboard scanning, a 
    parallel interface, and IDE interface, a configuration latch, and 
    a 1.8MHz UART clock generation circuit.
o   Keyboard scan interface in the multi-function mode requires only a 
    single external resister pack and provides an interrupt to the 
    system on key depression. The interface can be used instead as 
    general-purpose 16-bit output and 8-bit input ports.
o   Parallel interface in the multi-functional mode allows high-speed,
    PS/2-compatible bidirectional communication with other systems.
o   Configuration latch can be used to control seven external devices 
    plus the UART clock divider. An additional decode line accommo-
    dates an external latch for eight more device control lines.

**Other:...
**Disk:...
**Video:...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
**SL9010  System Controller (80286/80386SX/DX, 16/20/25MHz)     <oct88
***Info:...
***Versions:...
***Features:...
**SL9020  Data Controller                                       <oct88...
**SL9025  Address Controller                                    <oct88...
**SL9090  Universal PC/AT Clock Chip                            <oct88...
**SL9250  Page Mode Memory Controller (16/20MHz 8MB Max)        <oct88...
**SL9350  Page Mode Memory Controller (16/20/25MHz 16MB Max)    <oct88...
**Other:...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
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*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
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*ZyMOS...
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