[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
**F87000   Multi-Mode Peripheral Chip                         11/23/93
***Info:...
***Versions:...
***Features:
o   Fully static design substantially reduces power consumption when 
    compared to discrete TTL designs, allowing direct battery drive.
o   3.3V or 5V operation provides flexibility for system design and 
    allows dynamic 3.3/5V switching of system voltage to further 
    reduce power consumption.
o   Each F8700 device can be strapped to configure one of three 
    buffer modes or a multi-function mode, reducing parts inventory 
    requirements.
o   High integration means each F8700 mode replaces at least seven 
    discrete TTL devices.
o   Full isolation of PCMCIA memory and I/O cards is supported to 
    allow safe insertion and removal of cards, both "hot" and "cold."
o   PCMCIA buffer modes are completely PCMCIA 2.0-compatible.
o   For single PCMCIA card support, Mode 1 buffers 20 address lines 
    and 5 control lines.  Because of the quiet bus design of PC/CHIPm 
    the upper address lines can be connected directly to the PCMCIA 
    card slot in a single card system for full 64MB support.
o   For dual PCMCIA card support, Modes 2 and 3 together buffer all 
    necessary address and control lines for independent 64MB support 
    of each card.
o   Between PCMCIA cycles, the F87000 sets PCMCIA buses and control 
    lines to a low-power state to consume only a fraction of the power 
    used in a standard TTL buffer design.
o   Multi-function mode (Mode 4) provides keyboard scanning, a 
    parallel interface, and IDE interface, a configuration latch, and 
    a 1.8MHz UART clock generation circuit.
o   Keyboard scan interface in the multi-function mode requires only a 
    single external resister pack and provides an interrupt to the 
    system on key depression. The interface can be used instead as 
    general-purpose 16-bit output and 8-bit input ports.
o   Parallel interface in the multi-functional mode allows high-speed,
    PS/2-compatible bidirectional communication with other systems.
o   Configuration latch can be used to control seven external devices 
    plus the UART clock divider. An additional decode line accommo-
    dates an external latch for eight more device control lines.

**Other:...
**Disk:...
**Video:...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
**SL9010  System Controller (80286/80386SX/DX, 16/20/25MHz)     <oct88
***Info:...
***Versions:...
***Features:...
**SL9020  Data Controller                                       <oct88...
**SL9025  Address Controller                                    <oct88...
**SL9090  Universal PC/AT Clock Chip                            <oct88...
**SL9250  Page Mode Memory Controller (16/20MHz 8MB Max)        <oct88...
**SL9350  Page Mode Memory Controller (16/20/25MHz 16MB Max)    <oct88...
**Other:...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...