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**CS8281 NEATsx (386SX) (82C811/812/215/206) c:Dec89
***Info:...
***Configurations:...
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**CS8283 LeAPset-sx (82C841/82C242/82C636) c:Mar90...
**CS8285 PEAKsx (82C836/82C835) c91...
**CS8288 CHIPSlite-sx (82C836/82C641/82C835) c?...
**CS4000 WinCHIPS (64200/84021/84025) c92...
**CS4021 ISA/486 (84021/84025) c92...
**CS4031 CHIPSet (84031/84035) 5/10/93...
**CS4041/5 CHIPSet (84041/84045) 2/10/95...
**CB8291 ELEAT [no datasheet] c90...
**CB8295 ELEATsx [no datasheet] c90...
**82C100 IBM PS/2 Model 30/Super XT ?...
**82C110 IBM PS/2 Model 30/Super XT ?...
**82C235 Single Chip AT (SCAT) c89...
**82C836 Single Chip 386sx (SCATsx) <91...
**F8680/A PC/CHIP Single-Chip PC c93...
**
**Support Chips:
**64200 (Wingine) High Performance 'Windows Engine' c:Oct91
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***Versions:...
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**82C206 Integrated Peripheral Controller c86...
**82C601/A Single Chip Peripheral Controller <08/30/90...
**82C607 Multifunction Controller <Jun88...
**82C710 Universal Peripheral Controller c:Aug90...
**82C711 Universal Peripheral Controller II c:Jan91...
**82C712 Universal Peripheral Controller II c:Jan91...
**82C721 Universal Peripheral Controller III c:May93...
**82C735 I/O Peripheral Controller With Printgine c:Jul93...
**82C835 Single CHIP 386sx AT Cache Controller c:Apr91...
**F87000 Multi-Mode Peripheral Chip 11/23/93...
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**82489DX Advanced Programmable Interrupt Controller 10/12/92
***Notes:...
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**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
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**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
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*UMC...
**UM82C206 Integrated Peripheral Controller <91
***Info:
The UM82C206 Integrated Peripheral controller includes two 8237 DMA
controllers, two 8259 Interrupt controllers, one 8254 Timer/Counter,
one MC146818 compatible Real Time Clock, an additional 64 bytes CMOS
RAM, one 74LS612 memory mapper, and some top level decoder/
configuration logic circuits. It is a single chip integration of all
main peripheral parts attached to the X bus of PC/AT architecture.
While providing full compatibility with PC/AT architecture, the
UM82C206 also offers some enhanced features and improved speed
performance. These include an additional 64 bytes of user definable
CMOS RAM in real time clock and drastically reduced recovery time for
the 8237, 8259 and 8254. Programmable wait state option is provided
for the DME cycles and CPU I/O cycles accessing this chip. This chip
also provides programmable 8 or 4 MHz DMA clock selection. The
UM82C206 is implemented using advanced 1.5u CMOS design technology and
is packaged in an 84-pin PLCC.
***Versions:...
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**UM82c45x Serial/Parallel chips ?...
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