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**64200    (Wingine) High Performance 'Windows Engine'         c:Oct91
***Info:...
***Versions:...
***Features:
o   Cost effective Windows Accelerator
o   Interfaces directly with X86 SX/DX/DX2 Systems
o   Interfaces directly with ISA486 CHIPSet
o   High performance achieved via direct access frame buffer Memory 
    Bus Architecture
o   Direct linear mapping of entire video memory anywhere in system 
    memory space
o   Flexible video memory configurations:  8, 16, or 32-bit wide 
    VRAM (256KB–2MB)
o   Supports the following display modes with 1MB of VRAM:
    • 8bpp up to 1024x768 (interlaced or non-I/L)
    • 16bpp up to 800x600 (with Sierra RAMDAC)
    • 24bpp up to 640x480 (with Bt484 or equiv)
o   Supports higher resolution display modes with 2MB VRAM:
    • 8bpp up to 1280x1024 (non-interlaced)
    • 16bpp up to 1024x768 (interlaced or non-I/L)
    • 24bpp up to 800x600 (non-interlaced)
o   Highly integrated design (non-multiplexed system bus, direct bus 
    drive, minimum external glue logic)
o   All video shifting performed on-chip to allow use of low-cost VGA 
    RAMDACs (allows video rates to 80 MHz)
o   Compatible with high-resolution color palette RAMDACs such as the 
    Bt484 and TI 34075 having separate 8-bit and 32-bit parallel 
    inputs for direct connection to VRAM serial data (allows video 
    rates to 135 MHz)
o   Full VGA compatibility
o   Interfaces directly with the 82C481 True-Color Graphics 
    Accelerator
o   Direct interface to 82C404 programmable clock 
o   In-Circuit Testability Features
o   Small low-cost package:  EIAJ-standard 160-pin plastic flat pack
o   Chip pinouts optimized for PCB layo


**82C206   Integrated Peripheral Controller                        c86...
**82C601/A Single Chip Peripheral Controller                 <08/30/90...
**82C607   Multifunction Controller                             <Jun88...
**82C710   Universal Peripheral Controller                     c:Aug90...
**82C711   Universal Peripheral Controller II                  c:Jan91...
**82C712   Universal Peripheral Controller II                  c:Jan91...
**82C721   Universal Peripheral Controller III                 c:May93...
**82C735   I/O Peripheral Controller With Printgine            c:Jul93...
**82C835   Single CHIP 386sx AT Cache Controller               c:Apr91...
**F87000   Multi-Mode Peripheral Chip                         11/23/93...
**Other:...
**Disk:...
**Video:...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C898         System/Power Management Controller (non-cache)c:Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:
o   Processor interface:
    - Intel 486SX, DX, DX2, SLe, DX4, P24T, P24D 
    - AMD 486DX, DX2, DXL, DXL2, Plus
    - Cyrix DX, DX2, M7
    - CPU frequencies supported 20, 25, 33, 40 and 50MHz
    - Auto clock detection
o   DRAM interface:
    - Up to 128MB main memory support
    - Supports 256KB, 1MB, 4MB, and 16MB single- and double-sided SIMM 
      modules
    - Read page-hit timing of 3-2-2-2 at 33MHz
    - Supports hidden, slow, and CAS-before-RAS refresh
    - Eight RAS lines to support eight banks of DRAM
    - Programmable wait states for DRAM reads and writes
    - Enhanced DRAM configuration map
    - Strong drive on MA lines (12/24mA)
    - Supports asymmetric DRAMs
o   Power management:
    - Support for SMM (System Management Mode) for system power
      management implementations
    - Programmable power management
    - Programmable wake-up events through hardware, software, and 
      external SMI source
    - Multiple level GREEN support (NESTED_GREEN)
    - STPCLK# protocol support
    - Programmable GREEN event timer
o   ISA interface:
    - 100% IBM PC/AT ISA compatible
    - Integrates DMA, timer, and interrupt controllers
    - Optional PS/2 style IRQ1 and IRQ12 latching
o   VESA VL interface:
    - Conforms to the VESA V2.0 specification
    - Optional support for up to two VL masters
o   Miscellaneous features:
    - Full support for shadow RAM, and write protection for video, 
      adapter, and system BIOS
    - Enhanced arbitration scheme
    - Transparent 8042 emulation for fast CPU Reset and Gate A20 
      generation
o   Packaging:
    - Higher integration
    - Reduced TTL count
    - Low-power, high-speed 0.8-micron CMOS technology
    - 208-pin PQFP (Plastic Quad Flat Pack)

**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
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