[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
**CS4031 CHIPSet (84031/84035) 5/10/93
***Info:...
***Configurations:...
***Features:...
**CS4041/5 CHIPSet (84041/84045) 2/10/95...
**CB8291 ELEAT [no datasheet] c90...
**CB8295 ELEATsx [no datasheet] c90...
**82C100 IBM PS/2 Model 30/Super XT ?...
**82C110 IBM PS/2 Model 30/Super XT ?
***Notes:...
***Info:
The 82C110 is a single chip implementation of most of the system logic
necessary to implement a super XT compatible system with PS/2 Model 30
functionality using either an 8086 or 8088 microprocessor. The 82C110
can be used with either 8 or 16-bit microprocessors. The 82C110
includes features which will enable the PC manufacturer to design a
super PS/2 Model 30/XT compatible system with the highest performance
at 10 MHz zero wait state system with an 8086, the highest
functionality with dual clock and 2.5 MB DRAM {with integrated
Extended Memory System control logic}, the highest integration with
the lowest component count SMT design.
The 82C110 can be combined with-CHIPs’ 82C601 Multifunction Controller
and 82C451 VGA Graphics Controller to provide a high performance, high
integration PS/2 Model 30 type system.
The 82C110 supports most of the peripheral functions on the PS/2 Model
30 planar board; 8284 compatible clock generator with the option of 2
independent oscillators, 8288 compatible bus controller, 8237 comp-
atible DMA controller, 8259 compatible interrupt controller, 8254
compatible timer/counter, 8255 compatible peripheral I/O port. XT
Keyboard interface, Parity Generation and Checking for DRAM memory and
memory controller for DRAM memory sub-system.
The 82C110 enables the user to add PS/2 Model 30 superset func-
tionality on the planar board: dual clock, with synchronized switching
between the two, clocks. built-in Lotus-Intel-Microsoft (LIM) EMS
support for up to 2.5 Megabytes of DRAM.
The 82C110 supports a very flexible memory architecture. The DRAM
controller supports 64K, 256K and 1M DRAMs. These DRAMs gen be
organized in four banks of up to a maximum of 2.5 MB on the planar
board. The 2.5 MB memory can be implemented with 2 banks of 7M X 1
DRAMs, partitioned locally as 540KB of real memory and 1,875 MB of EMS
memory. The 82C110 is packaged in a 100-pin plastic flatpack.
***Configurations:...
***Features:...
**82C235 Single Chip AT (SCAT) c89...
**82C836 Single Chip 386sx (SCATsx) <91...
**F8680/A PC/CHIP Single-Chip PC c93...
**
**Support Chips:
**64200 (Wingine) High Performance 'Windows Engine' c:Oct91...
**82C206 Integrated Peripheral Controller c86...
**82C601/A Single Chip Peripheral Controller <08/30/90...
**82C607 Multifunction Controller <Jun88...
**82C710 Universal Peripheral Controller c:Aug90...
**82C711 Universal Peripheral Controller II c:Jan91...
**82C712 Universal Peripheral Controller II c:Jan91...
**82C721 Universal Peripheral Controller III c:May93...
**82C735 I/O Peripheral Controller With Printgine c:Jul93...
**82C835 Single CHIP 386sx AT Cache Controller c:Apr91...
**F87000 Multi-Mode Peripheral Chip 11/23/93...
**Other:...
**Disk:...
**Video:...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82485 Turbo Cache (and 485Turbocache) c90
***Notes:...
***Info:...
***Versions:...
***Features:...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99
Chips:
Memory Access Controller (MAC)
Data Interface Buffer (DIB)
CPUs: 8x P-III Xeon Oct
DRAM Types: SDRAM PC100 2-way Interleave dual channel
Max Mem: 32GB
ECC/Parity: ECC
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3 PCI-66/64
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
(c) Copyright mR_Slugs Warehouse - All rights Reserved