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**????? (Profusion) c:99
Chips:
Memory Access Controller (MAC)
Data Interface Buffer (DIB)
CPUs: 8x P-III Xeon Oct
DRAM Types: SDRAM PC100 2-way Interleave dual channel
Max Mem: 32GB
ECC/Parity: ECC
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3 PCI-66/64
**800 series...
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**SL82C490 'Wagner' 486? [no datasheet] ?
***Notes:...
**SL82C550 'Rossini' Pentium [no datasheet] c:95...
**
**Support Chips:
**SL82C365 Cache Controller (for 386DX/SX) c:91...
**SL82C465 Cache Controller (for 486/386DX/SX) c:91...
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**W86C452 I/O controller for IBM PC/AT Jul89
***Info:...
***Versions:...
***Features:
o Easily interfaces to most popular microprocessors.
o Dual-channel version of W86C450
o Centronics printer interface
o Independently controlled transmit, receive, line status, and data
set interrupts.
o Programmable baud generator allows division of any input clock
by l to (2^16 -l) and generates the internal 16 x clock.
o Independent receiver clock input.
o MODEM control functions (CTS, RTS, DSR, DTR. RI. and DCD).
o Fully programmable serial-interface characteristics:
- 5, 6, 7. or 8-bit characters
- Even, odd. or no-parity bit generation and detection
- 1, 1.5 or 2-stop bit generation
o False start bit detection.
o TRl-STATE TTL drive capabilities for bidirectional data bus and
control bus on each channel
o Internal diagnostic capabilities:
- Loopback controls for communications link fault isolation
- Break, parity, overrun, framing error simulation.
o Fully prioritized interrupt system controls.
**W86C456 I/O controller [no datasheet] ?
**W860551/P UART with FIFO and Printer Port Controller <94...
**
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*ZyMOS...
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