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**450NX (?) 06/29/98:
Chips:
[82454NX] (PXB) [82453NX] (MUX)
[82452NX] (RCG) [82451NX] (MIOC)
[82371EB] (PIIX4E),
CPUs: Single/Dual/Quad P-II Xeon/P-III Xeon
DRAM Types: FPM EDO 2-way Interleave 4-way Interleave
Mem Rows: 8
DRAM Density: 16Mbit 64Mbit
Max Mem: 8GB
ECC/Parity: Both
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3
**????? (Profusion) c:99...
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**5120 Pentium PCI/ISA Chipset (Mobile) <01/28/97
***Info:...
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**5501/5502/5503 Pentium/P54C PCI/ISA Chipset <04/02/95...
**5511/5512/5513 Pentium PCI/ISA <06/14/95...
**5571 (Trinity) Pentium PCI/ISA Chipset (75MHz) <12/09/96...
**5581/5582 (Jessie) Pentium PCI/ISA Chipset (75MHz) <04/15/97...
**5591/5592/5595 (David) Pentium PCI A.G.P. Chipset <01/09/98...
**5596/5513 (Genesis) Pentium PCI Chipset <03/26/96...
**5597/5598 (Jedi) Pentium PCI/ISA Chipset <04/15/97...
**530/5595 (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540 (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x SoC (System-on-chip) <03/14/02...
**
**Support chips:
**85C206 Integrated Peripheral Controller [no datasheet] ?...
**5595 Pentium PCI System I/O <12/24/97...
**950 LPC I/O <07/16/99...
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**W86C452 I/O controller for IBM PC/AT Jul89
***Info:
GENERAL DESCRIPTION
The W86C452 is an enhanced dual-channel version of the popular W86C450
asynchronous communication element (ACE) fabricated using WINBOND'S
CMOS process. It is equivalent to VL160452 of the VLSI Technology
Inc.
The device supports two serial-to-parallel conversion on data
characters received from a peripheral device or a MODEM. and
parallel-to-serial conversion on data characters received from the
CPU.
The CPU can read the complete status of the UART at any time during
the functional operation. Status information reported includes the
type and condition of the transfer operations being performed by the
UART as well as any error conditions (parity. overrun, framing, or
break interrupt).
The UART includes a programmable baud rate generator that is capable
of dividing the timing reference clock input by divisors of l to (2^16
-1), and producing a 16 x clock for driving the internal transmiter
logic. Provisions are also included to use this 16 x clock to drive
the receiver logic. The UART includes a complete MODEM-control
capability and a processor-interrupt system. Interrupts can be
programmed to the user’s requirements, minimizing the computing
required to handle the communications link.
In addition to its communication interface capabilities, the W86C452
provides the user with a fully bidirectional parallel Centronics type
printer. This part allows information received from either serial
communication port to be printed from the dual ACE.
***Versions:...
***Features:...
**W86C456 I/O controller [no datasheet] ?
**W860551/P UART with FIFO and Printer Port Controller <94...
**
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