[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**440 series:
***440FX (Natoma)       05/06/96...
***440LX (Balboa)       08/27/97...
***440BX (Seattle)      c:Apr'98...
***440DX (?)            c:?...
***440EX (?)            c:Apr'98...
***440GX (Marlinespike) 06/29/98...
***440ZX & 440ZX-66 (?) 01/04/99...
***440ZX-M (?)          05/17/99...
***440MX (Banister)     05/17/99...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
**UM82C480     386/486 PC Chip Set                                 c91
***Info:...
***Configurations:...
***Features:
o   100% IBM PC/AT compatible
o   Supports 80386 CPU running at 25/33/40 MHz
o   Supports 80486 CPU running at 25/33/40/50 MHz in 1x clock
o   Supports Intel 80387 / Weitek 3167 / Weitek 4167 Floating Point 
    Coprocessors
o   Built-in cache controller:
    - Direct-mapped organization with write-back operation
    - 0 wait state for cache hit
    - Flexible cache size: 32/64/128/256/512/1024 KB
    - Hidden DRAM refresh to boost system performance
    - built-in registers to support three independent non-cacheable 
      regions
    - Support cache line fill as well as 80486 burst mode
    - Support Automatic Memory Size Detection
o   Sophisticated DRAM controller:
    - Supports Fast/Standard page mode
    - Supports 4 banks CPU speed DRAM with memory size up to 64MB
    - Supports mixable 256Kx9, 1Mx9, 4Mx9 DRAM modules
    - Programmable DRAM wait states
    - Supports 256KB or 384KB (A to F segments of first 1MB) 
      relocation to the top of DRAM memory
o   Supports sophisticated Shadow RAM for video and system BIOS (C, D,
    E, F segments)
o   Supports first GATE A20 and fasy CPU RESET to optimize OS/2 
    operations
o   Synchronous AT bus clock with programmable clock (divided by 2, 3,
    4, 5, 6)
o   Programmable CPU clock (divided by 1, 2, 3, 4)
o   Support 256KB/512KB/1MB EPROMs with single or double EPROM BIOS 
    configuration

**UM82C493/491 ??????????????? [no datasheet]                        ?...
**UM8498/8496  486 VL Chipset  "Super Energy Star Green"[no dsheet]c94...
**UM8881/8886  HB4 PCI Chipset "Super Energy Star Green"[no dsheet]c94...
**UM8890       Pentium chipset [no datasheet]                        ?...
**
**Support Chips:
**UM82152      Cache Controller (AUStek A38152 clone)              <91...
**UM82C852     Multi I/O For XT                                    <91...
**UM82C206     Integrated Peripheral Controller                    <91...
**UM82c45x     Serial/Parallel chips                                 ?...
**Other chips:...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W83769          Local Bus IDE Solution                           <94
***Info:...
***Versions:...
***Features:...
**
**UARTS:
**W86C250A  UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter         <Jul89...
**W86C451   I/O controller for IBM PC/AT/XT                     <Jul89...
**W86C452   I/O controller for IBM PC/AT                         Jul89...
**W86C456   I/O controller [no datasheet]                            ?
**W860551/P UART with FIFO and Printer Port Controller             <94...
**
**Other:...
*ZyMOS...
*General Sources:...