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*Intel...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:
The Intel 82495XP cache controller and 82490XP cache RAM, when coupled
with a user-implemented memory  bus controller, provide a second-level
cache  subsystem  that eliminates  the  memory  latency and  bandwidth
bottleneck for  a wide  range of multiprocessor  systems based  on the
i860 XP  microprocessor. The CPU  interface is optimized to  serve the
i860  XP microprocessor  with zero  wait  states at  up to  50 MHz.  A
secondary cache  built from the  82495XP and 82490XP isolates  the CPU
from  the memory subsystem;  the memory  can run  slower and  follow a
different protocol than the i860 XP microprocessor.
         
***Features:...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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*SIS...
**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99
***Info:...
***Configurations...
***Features:...
**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
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*Winbond...
**W83759/A/F/AF   Advanced VL-IDE Disk Controller                  <96
***Notes:...
***Info:...
***Versions:...
***Features:
o  Pin-to-pin backward compatible with W83759 VL-IDE Interface chip
o  VESA VL-Bus Rev 2.0 compatible, connects directly to local bus and 
   four IDE drives
o  Direct interface to various ANSI ATA/ATA-2/FAST ATA/IDE-2/Enhanced 
   IDE drives
o  Supports 32 and 16-bit data transfer
o  Fully software programmable for command active/recovery time and 
   address setup, data hold time
o  Built-in VL-Bus to 16-bit IO data buffer for special applications
o  Fully supports Enhanced IDE features, including Fast PIO, Mode 3/4, 
   IORDY flow control, prefetch control
o  Supports dual channels to allow up to four drives or non-disk 
   devices (ATAPI CD-ROM and tape drives)
o  Pipeline pre-fetched reads and posted writes for concurrent disk 
   and host operations
o  Independent access timing for all drives (primary/secondary and 
   master/slave)
o  All Enhanced IDE new features may be disabled/enabled via driver 
   or power-on setting by per drive selectability
o  ATA/Mode 0-4 PIO speed may be set as default timing of each drive 
   via power-on jumper setting
o  Supports slave DMA mode protocol (reserved)
o  Supports auto power-down, standby, suspend APM power management 
   state for green PCs
o  Primary and secondary channel can be independently enabled/disabled 
   by software or jumper setting
o  Supports drivers for DOS, Windows, OS/2, UNIX, and Netware
o  Packaged in 100-pin QFP

**W83769          Local Bus IDE Solution                           <94...
**
**UARTS:
**W86C250A  UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter         <Jul89...
**W86C451   I/O controller for IBM PC/AT/XT                     <Jul89...
**W86C452   I/O controller for IBM PC/AT                         Jul89...
**W86C456   I/O controller [no datasheet]                            ?
**W860551/P UART with FIFO and Printer Port Controller             <94...
**
**Other:...
*ZyMOS...
*General Sources:...