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*_IBM...
*ACC Micro...
**ACC82010   AT Chip Set          (286 12.5/16MHz Max)             c88
***info:...
***Configurations:...
***Features:...
**ACC82020   Turbo PC/AT Chip Set (286/386SX 25MHz Max)            c88...
**ACC82021   Turbo PC/AT Chip Set (286/386SX 25MHz Max)            >88...
**ACC82300   386 AT Chip Set (386DX)                               c88...
**ACC82C100  Single-Chip PC/XT Systems-Controller                  c90...
**ACC83000   Model 30 Integrated Chip Set (MCA)                    c88...
**ACC85000/A Model 50/60 Chipset (MCA)                             c88...
**ACC1000    Turbo PC/XT Integrated Bus and Peripheral Ctrl.  04/02/88...
**ACC2036    Single Chip Solution 2036 (286/386SX)              <Jul92...
**ACC2046/ST 486DX/486SX/386DX Single Chip AT                   <Jul92...
**ACC2048    WB 486 Notebook/Embedded Single Chip [no datasheet]     ?...
**ACC2051/NT PCI Single Chip Solution for Notebook Applications    c96...
**ACC2056    ?Pentium 3.3V Notebook               [no datasheet]<Jan96...
**ACC2057    PCI Notebook/Embedded Single Chip    [no datasheet]<Aug96...
**ACC2066NT  486 Notebook/Embedded Single Chip    [no datasheet]     ?...
**ACC2086    486 VL-based System Super Chip Soluti[no datasheet]     ?...
**ACC2087    Enhanced Super Chip (486 Single Chip)              <Aug96...
**ACC2089    486 PCI-based System Super Chip      [no datasheet]     ?...
**ACC2168/GT 32-bit 486 Green System Single Chip  [no datasheet]     ?...
**ACC2178A   32-bit 486 Green System Single Chip  [no datasheet]     ?...
**ACC2268    ?486                                 [no datasheet]     ?...
**ACC????    Maple/Maple-133 486-System-On-Chip   [no datasheet]     ?...
**
**Support Chips:
**ACC2016    Buffer and MUX Logic                                  c96...
**ACC2020    Power Management Chip                                 c92...
**ACC5500    Multifunction I/O Control Chip for PS2 Model 50/60    c88...
**
**Other chips...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
**WD76C30x   Perip. Ctrl, Interrupt Multiplex, and Clock Gen <11/18/91
***Notes:...
***Info:...
***Versions:...
***Features:
o   Two fully programmable and independent serial I/O ports 
    configurable as PC/AT compatible (WD16C452) or PS/2 
    compatible (WD16C552)
    - Loopback controls for communications link fault isolation for 
      each ACE
    - Line break generation and detection for each ACE
    - Complete status reporting capabilities
    - Generation and stripping of serial asynchronous data control 
      bits (start, stop, parity)
    - Programmable baud rate generator and MODEM control signals for 
      each port
    - Programmable baud rate generator input clock
    - Optional 16 byte FIFO buffers on both transmit and receive of 
      each port for CPU relief during high speed data transfer
    - Programmable FIFO threshold levels of 1 , 4, 8, or 14 bytes on 
      each port
o   Parallel port configurable as a fully Centronics or PS/2 
    compatible, bidirectional parallel port
o   Independently programmable parallel port
o   Interrupt multiplexing logic
    - Selectable multiplexing logic for connecting PC/AT interrupt 
      request lines to the WD76C10 single chip AT controller
o   Clock generation circuitry
    - 80287 coprocessor clock generation
    - WD76C10 and floppy controller clock generation
    - 8042 keyboard clock generation
o   Built-in testability features
o   Hardware or software controllable sleep mode
o   CMOS implementation for high speed and low power requirements 
o   Pulse extension on IRQ inputs
o   84-pin PLCC and PQFP packages

**WD7615     Desktop Buffer Manager                          <04/15/92...
**WD7625     Desktop Buffer Manager                          <10/01/92...
**WD8120LV   Super I/O [no datasheet]                                ?
**Other Chips:...
*Winbond...
*ZyMOS...
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