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**Ml429/31/35    486 VLB/PCI/ISA      [no datasheet, some info] cOct93
***Notes:...
***Configurations:...
**M1439/31/45    486 VLB/PCI/ISA      [no datasheet, some info] <May95...
**M1489/87       FinALi-486 PCI Chipset                         <Feb95...
**M????          Genie, Quad Pentium  [no datasheet, some info]    c95...
**M1451/49       Aladdin    (Pentium) [no datasheet]                 ?...
**M1511/12/13    Aladdin II (Pentium) [no datasheet, some info] >Apr95...
**M1521/23       Aladdin III       50-66MHz                     <Nov96...
**M1531/33/43    Aladdin IV & IV+  50-83.3MHz                <05/28/97...
**M1541/42/33/43 Aladdin V & V+    50-100MHz                         ?...
**M1561/43/35D   Aladdin 7 ArtX    [no datasheet, some info]  11/08/99...
**M6117          386SX Single Chip PC                              <97...
**
**Support Chips:
**M1535/D        South Bridge                                        ?...
**
**May not exist:...
**Later Chipsets:
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*AMD . . . . . . . [no datasheets, some info]...
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*Contaq  . . . . . [no datasheets, some info]...
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**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



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**WD7625     Desktop Buffer Manager                          <10/01/92
***Info:...
***Versions:...
***Features:
ADDRESS BUFFER FEATURES
o   Allows WD7SC10A, WD7855, WD8110, WD7710, and WD7910 based designs 
    with WD7620/30 for laptop or notebook systems
o   Will work in three different power supply modes:
    - 3.3V only
    - 5V only
    - Mix mode 3.3V and 5V
o   Direct connect to AT Address Bus SA1:19 and LA17:23 with 24 mA 
    drive
o   Power Management Control (PMC) input MUX 
o   General purpose suspend/resume and power supply control logic
o   Fifteen-bit Power Management Control (PMC) output register and 
    control logic
o   Low power request and resume signal delay simplify the design of 
    the power supply
o   Watchdog timer for system idle detection
o   DRAM WE signal from WD7xc10 inversion and buffering
o   RESIN output generation from reset switch (RSTSW)
o   System Reset generation
o   Chip select decoding for registers in the WD7625LV Data Buffer 
    Function
o   144-pin SQFP package

DATA BUFFER FEATURES
o   Allows WD7SC10A, WD7855, WD7710, and WD7910 based designs with 
    WD7620/30 for laptop or notebook systems
o   Will work in three different power supply modes:
    - 3.3V only
    - 5V only
    - Mix mode 3.3V and 5V
o   Direct connection to AT data bus; 20K integrated pull-up for 
    SD(0:7)
o   Direct connection to IDE data bus
o   Two general purpose 8-bit I/O registers:
    - Register A
    - Register B
o   One general purpose 8-bit I/O Register C, with single bit 
    set/reset control
o   One general purpose 1-bit I/O Register Y0
o   One 4-bit general purpose input only Register Z
o   DRQ multiplexing plus 20K integrated pull-down
o   DACK demultiplexing
o   SMEMR, SMEMW signals plus 22K internal pull-up
o   144-pin SOFP package

**WD8120LV   Super I/O [no datasheet]                                ?
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