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**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
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**
**Later chipsets (basic spec):
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**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**SL82C365    Cache Controller (for 386DX/SX)                     c:91
***Info:...
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**SL82C465    Cache Controller (for 486/386DX/SX)                 c:91...
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**VL82C108 TOPCAT Combination I/O chip                               ?
***Info:...
***Versions:...
***Features:...
**VL82C110 Combination I/O chip                                      ?...
**VL82C113 SCAMP  Combination I/O chip                               ?...
**VL82C114 Combination I/O chip                                      ?
***Info:...
***Versions:...
***Features:
o   Integrated peripheral controller that interfaces with several of 
    VLSI's Single Chip System/ISA Bus controllers
    - VL82C480
    - VL82C481
    - VL82C486
    - VL82C310
    - VL82C311
    - VL82C311L
o   Backwards compatible with the industry standard VL82C113A
o   146818A-Compatible real-time clock
o   114 additional bytes of battery-backed CMOS RAM
o   AT-compatible keyboard controller with integrated PS/2 mouse 
    support
o   Processor to ISA bus address latches and buffers, which support 
    16- and 32-bit processors.
o   Supports processors with write-back cache controllers
o   Real-time clock can be relocated via SA[15:0] address registers
o   Includes ISA bus refresh counters for decoupled refresh
o   1.0-micron CMOS 
o   100-lead MQFP (Metric Quad Flat Pack)

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