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*Contaq . . . . . [no datasheets, some info]...
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*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**450NX (?) 06/29/98:
Chips:
[82454NX] (PXB) [82453NX] (MUX)
[82452NX] (RCG) [82451NX] (MIOC)
[82371EB] (PIIX4E),
CPUs: Single/Dual/Quad P-II Xeon/P-III Xeon
DRAM Types: FPM EDO 2-way Interleave 4-way Interleave
Mem Rows: 8
DRAM Density: 16Mbit 64Mbit
Max Mem: 8GB
ECC/Parity: Both
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
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*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**540 (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99
***Info:...
***Configurations...
***Features:...
**55x SoC (System-on-chip) <03/14/02...
**
**Support chips:
**85C206 Integrated Peripheral Controller [no datasheet] ?...
**5595 Pentium PCI System I/O <12/24/97...
**950 LPC I/O <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
**VL82C380 Single chip 386DX PC/AT Controller +on-chip cache ?
***Info:...
***Configuration:...
***Features:
o Highly integrated system solution using VL82C380 single-chip
ISA controller, VL82C113A Combination I/O chip and 3 TTLs
o Supports one- or two-bank write-back cache
- External TAGs
- 32 Kbyte to 1 Mbyte cache size
- 0 or 1 wait state writes
- Separate dirty RAM not required; first write to clean, valid
line sets dirty bit
o Caches main system DRAM only
o Maintains full coherency during DMA/MASTER mode cycles
o Optional remap of video and hard disk ROM BIOS onto motherboard,
allowing use of single BIOS ROM
o Optional bus acceleration for video accesses, with programmable
address regions
o Software-configurable
o Utilizes proven 8254, 8237, 8259 megacalls used in all previous
VLSI Technology PC/AT chipsets
o High-performance memory controller:
- One wait state red up to 33 MHz, Zero wait state reads up to
40 MHz
- Automatic configuring of Bank start address
- Each bank individually configurable for any supported DRAM type
- shadow RAM support form 640K to 1M in 16K segments
- Staggered refresh reduces power supply peak currents
- Decoupled-mode refresh improves performance
- Programmable refresh frequency for support of slow-refresh DRAMs
- Up to 64 Mbytes of motherboard memory in one to four banks using
256K, 1M, and/or 4Mbit DRAM, all motherboard memory is cacheable
- Direct-drive up to 2 banks (32 Mbyte) of motherboard memory
- Two-way page mode interleave
- Supports 32-bit ini-interleaved or interleaved configurations
- Programmable RAS/CAS timing supported for Cycle-start, Trp,
Trcd, and Tacs
**VL82C325 VL82C386SX System Cache controller ?...
**VL82C335 VL82C386DX System Cache ctrl. [no d.sheet] ?...
**VL82C315A/322A/3216 Kodiak 32-Bit Low-Voltage Chip Set ?...
**VL82C420/144/146 SCAMP IV [no datasheet, some info] c93...
**VL82C480 System/Cache/ISA bus Controller ?...
**VL82C481 System/Cache/ISA bus Controller c92...
**VL82C486 Single-Chip 486, SC486, Controller ?...
**VL82C425 486 Cache controller ?...
**???????? Cheetah 486, PCI [no datasheet] ?...
**VL82C3216 Bus Expanding Controller Cache with write buffer ?...
**VL82C521/522 Lynx/M ?...
**VL82C530 Eagle Ð c95...
**VL82C541/543 Lynx c95
***Notes:...
***Basics:...
***Info:...
***Configurations:...
***Features:...
**VL82C591/593 SuperCore 590 c94...
**VL82C594/596/597 Wildcat c95...
**I/O Chips:
**VL82C106 Combination I/O chip ?...
**VL82C107 SCAMP Combination I/O chip ?...
**VL82C108 TOPCAT Combination I/O chip ?...
**VL82C110 Combination I/O chip ?...
**VL82C113 SCAMP Combination I/O chip ?...
**VL82C114 Combination I/O chip ?...
**Video: ...
**Disk:...
**Modems:...
**Other:...
**Not sure if they actually exist...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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