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*Contaq . . . . . [no datasheets, some info]...
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**450NX (?) 06/29/98:
Chips:
[82454NX] (PXB) [82453NX] (MUX)
[82452NX] (RCG) [82451NX] (MIOC)
[82371EB] (PIIX4E),
CPUs: Single/Dual/Quad P-II Xeon/P-III Xeon
DRAM Types: FPM EDO 2-way Interleave 4-way Interleave
Mem Rows: 8
DRAM Density: 16Mbit 64Mbit
Max Mem: 8GB
ECC/Parity: Both
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
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*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**5597/5598 (Jedi) Pentium PCI/ISA Chipset <04/15/97
***Info:...
***Configurations:...
***Features:...
**530/5595 (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540 (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x SoC (System-on-chip) <03/14/02...
**
**Support chips:
**85C206 Integrated Peripheral Controller [no datasheet] ?...
**5595 Pentium PCI System I/O <12/24/97...
**950 LPC I/O <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
**VL82C480 System/Cache/ISA bus Controller ?
***Info:...
***Configurations:...
***Features:
o Fully compatible with 486-based ISA bus systems
o Power-on reset option selects various operational modes
o Up to 40 MHz CPU operation
o Replaces the following peripheral logic on the motherboard:
- Two 82C37A DMA controllers
- 74LS612 memory mappers (extended to support 64 MB)
- Two 82C59A interrupt controllers
- 82C54 timer
- 82284 clock generator and ready interface
- 82288 bus controller
o Memory controller features include:
- Up to 64 MB system memory
- 256K, 1M or 4M DRAM
- Double-sided SIMMs
- Page Mode DRAM access
- Two-way interleave support
- Programmable RAS#/CAS# timing
- Burst read and write support
- Parity generation/checking for on-board DRAM
- Staggered RAS# refresh
o Supports:
- One to four banks 32 bits wide
- 8- or 16-bit wide BIOS ROM
- shadow RAM in the 640K-1M area
- Asynchronous ISA bus operation up to 16 MHz
- Relocation of slot ROMs
- Access to devices residing on the local bus
- Weitek 4167 numeric coprocessor
o 0.8-micron CMOS technology
o 208-lead MQFP (metric quad flat pack)
o Includes:
- Memory/refresh controller
- Port A, B, and NMI logic
- Bus steering logic
- Turbo control
- hidden refresh
- Three-stateable outputs for board testing
o Selectable slow DRAM refresh saves power
o On-chip write-back cache controller:
- External tags
- Direct map
- Separate "dirty" RAM not required
- 2-1-1-1 reads with two banks, 2-2-2-2 with one bank
- 32 KB to 1MB cache size
- One wait state writes on cache-hits
- Optional zero wait state writes
- Optional one wait state reads
o Other features:
- Programmable for 10- or 16-bit internal I/O addressing
- Programmable drive on the DRAM and ISA bus signals
- Programmable memory access to define "fast-bus", local bus, slot
bus, non-cacheable and write-protect areas
- Input pin defines access to local bus devices
**VL82C481 System/Cache/ISA bus Controller c92...
**VL82C486 Single-Chip 486, SC486, Controller ?...
**VL82C425 486 Cache controller ?...
**???????? Cheetah 486, PCI [no datasheet] ?...
**VL82C3216 Bus Expanding Controller Cache with write buffer ?...
**VL82C521/522 Lynx/M ?...
**VL82C530 Eagle Ð c95...
**VL82C541/543 Lynx c95...
**VL82C591/593 SuperCore 590 c94...
**VL82C594/596/597 Wildcat c95...
**I/O Chips:
**VL82C106 Combination I/O chip ?...
**VL82C107 SCAMP Combination I/O chip ?...
**VL82C108 TOPCAT Combination I/O chip ?...
**VL82C110 Combination I/O chip ?...
**VL82C113 SCAMP Combination I/O chip ?...
**VL82C114 Combination I/O chip ?...
**Video: ...
**Disk:...
**Modems:...
**Other:...
**Not sure if they actually exist...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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