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**450NX  (?)            06/29/98:
Chips:
[82454NX] (PXB) [82453NX] (MUX) 
[82452NX] (RCG) [82451NX] (MIOC) 
[82371EB] (PIIX4E),                            
CPUs:          Single/Dual/Quad P-II Xeon/P-III Xeon
DRAM Types:    FPM EDO 2-way Interleave 4-way Interleave
Mem Rows:      8
DRAM Density:  16Mbit 64Mbit
Max Mem:       8GB
ECC/Parity:    Both
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3


**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



**800 series...
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**VL82C325             VL82C386SX System Cache controller            ?
***Info:...
***Versions:...
***Features:
o   Optimized for TOPCAT 386SX and SCAMP-LT chip sets
o   Improved i386SX and AMD386SX system performance:
    - Fast look-aside architecture
    - Zero wait state read-hit access
    - Reduces average processor wait states to near zero
o   Multiple cache organizations
    - Two-way set associative: 16KB
    - Two-way set associative: 32KB
o   Memory update strategy
    - Write-thru
o   Least recently used (LRU) replacement algorithm
o   Integrates complete cache directory on-chip
o   Supports memory configurations to 16 MB
o   Programmable cache architecture
    - Block size: 8 or 16 bytes
    - Line size: 2 bytes
    - Update strategies: single cycle (one line)
o   Write-protect region support
    - Write-protect regions (#): 256
    - Write-protect region size: 2KB between 512K and 1M
o   Non-cacheable region support
    - Non-cache regions (#): 504
    - Non-cacheable region size: 
         64KB below 512K
         2KB between 512K and 1M
         64KB above 1M
o   25 MHz operation
o   Optimized for one or two dual 4K x8 cache data RAMs
o   Operates both in pipelined and in non-pipelined modes
o   Built-in self-test and cache data RAM testability features
o   Auto-flush on EMS-update events
o   100-lead MQFP

**VL82C335             VL82C386DX System Cache ctrl. [no d.sheet]    ?...
**VL82C315A/322A/3216  Kodiak 32-Bit Low-Voltage Chip Set            ?...
**VL82C420/144/146     SCAMP IV [no datasheet, some info]          c93...
**VL82C480         System/Cache/ISA bus Controller                   ?...
**VL82C481         System/Cache/ISA bus Controller                 c92...
**VL82C486         Single-Chip 486, SC486, Controller                ?...
**VL82C425         486 Cache controller                              ?...
**????????         Cheetah 486, PCI [no datasheet]                   ?...
**VL82C3216        Bus Expanding Controller Cache with write buffer  ?...
**VL82C521/522     Lynx/M                                            ?...
**VL82C530         Eagle Ð                                         c95...
**VL82C541/543     Lynx                                            c95...
**VL82C591/593     SuperCore 590                                   c94...
**VL82C594/596/597 Wildcat                                         c95...
**I/O Chips:
**VL82C106 Combination I/O chip                                      ?...
**VL82C107 SCAMP  Combination I/O chip                               ?...
**VL82C108 TOPCAT Combination I/O chip                               ?...
**VL82C110 Combination I/O chip                                      ?...
**VL82C113 SCAMP  Combination I/O chip                               ?...
**VL82C114 Combination I/O chip                                      ?...
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**Other:...
**Not sure if they actually exist...
*Western Digital...
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*ZyMOS...
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