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**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
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**82C650/1/2 Discovery (Pentium Pro) [no datasheet] ?
***Configurations:...
**82C681/2/6/7 386/486WB EISA c:92...
**82C683 386/486AWB EISA [no datasheet] ?...
**82C693/6/7 Pentium uP Write Back Cache EISA c:93...
**82C700 FireStar c:97...
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
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**VT82C686A/B PCI Super-I/O Integrated Peripheral Ctrl. <02/10/98
***Info:
****All:...
****VT82C686B only:...
****All:
standard.
The IDE controller is SFF-8038i v1.0 and Microsoft Windows-family
compliant.
b) Universal Serial Bus controller that is USB v1.1 and Universal HCI
v1.1 compliant. The VT82C686A includes the root hub with four
function ports with integrated physical layer transceivers. The USB
controller allows hot plug and play and isochronous peripherals to be
inserted into the system with universal driver support. The
controller also implements legacy keyboard and mouse support so that
legacy software can run transparently in a non-USB-aware operating
system environment.
c) Keyboard controller with PS2 mouse support.
d) Real Time Clock with 256 byte extended CMOS. In addition to the
standard ISA RTC functionality, the integrated RTC also includes the
date alarm, century field, and other enhancements for compatibility
with the ACPI standard.
e) Notebook-class power management functionality compliant with ACPI
and legacy APM requirements. Multiple sleep states (power-on suspend,
suspend-to-DRAM, and suspend-to-Disk) are supported with hardware
automatic wake-up. Additional functionality includes event
monitoring, CPU clock throttling and stop (Intel processor protocol),
PCI bus clock stop control, modular power, clock and leakage control,
hardware-based and software-based event handling, general purpose I/O,
chip select and external SMI.
f) Hardware monitoring subsystem for managing system / motherboard
voltage levels, temperatures, and fan speeds
g) Full System Management Bus (SMBus) interface.
h) Two 16550-compatible serial I/O ports with infrared communications
port option on the second port.
i) Integrated PCI-mastering dual full-duplex direct-sound AC97-
link-compatible sound system. Hardware soundblaster-pro and hardware-
assisted FM blocks are included for Windows DOS box and real-mode DOS
compatibility. Loopback capability is also implemented for directing
mixed audio streams into USB and 1394 speakers for high quality
digital audio.
j) Two game ports and one MIDI port
k) ECP/EPP-capable parallel port
l) Standard floppy disk drive interface
m) Distributed DMA capability for support of ISA legacy DMA over the
PCI bus. Serial IRQ is also supported for docking and non-docking
applications.
n) Plug and Play controller that allows complete steerability of all
PCI interrupts and internal interrupts / DMA channels to any interrupt
channel. One additional steerable interrupt channel is provided to
allow plug and play and reconfigurability of on-board peripherals for
Windows family compliance.
o) Internal I/O APIC (Advanced Programmable Interrupt Controller)
The VT82C686A also enhances the functionality of the standard ISA
peripherals. The integrated interrupt controller supports both edge
and level triggered interrupts channel by channel. The integrated DMA
controller supports type F DMA in addition to standard ISA DMA modes.
Compliant with the PCI-2.2 specification, the VT82C686A supports
delayed transactions and remote power management so that slower ISA
peripherals do not block the traffic of the PCI bus. Special
circuitry is built in to allow concurrent operation without causing
dead lock even in a PCI-to-PCI bridge environment. The chip also
includes eight levels (doublewords) of line buffers from the PCI bus
to the ISA bus to further enhance overall system performance.
***Versions:...
***Features:...
**Later P-Pro/II/III/Celeron...
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