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**450NX (?) 06/29/98:
Chips:
[82454NX] (PXB) [82453NX] (MUX)
[82452NX] (RCG) [82451NX] (MIOC)
[82371EB] (PIIX4E),
CPUs: Single/Dual/Quad P-II Xeon/P-III Xeon
DRAM Types: FPM EDO 2-way Interleave 4-way Interleave
Mem Rows: 8
DRAM Density: 16Mbit 64Mbit
Max Mem: 8GB
ECC/Parity: Both
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**Other:
OPTi 82C200 - ChromaCast LCD-VGA chipset
OPTi 82C205 - LCD panel controller / scalar
OPTi 82C264 - 2D VGA controller
OPTi 82C265 - Video ????????????????????????????
OPTi 82C268 - Video ????????????????????????????
OPTi 82C611 - EIDE VLB
OPTi 82C611A - EIDE VLB
OPTi 82C621 - PCI-to-IDE controller
OPTi 82C621A - PCI-to-IDE controller
OPTi 82C824 - FireFox PCI to PCMCIA Controller
OPTi 82C825 - FireBridge II PCI to PCMCIA Controller
OPTi 82C814 - Docking Station Controller for laptops (PCI-to-PCI bridge)
OPTi 82C842 - PCI-to-IEEE 1393 FireWire
OPTi 82C832 - ?????????????????????????????????????????
OPTi 82C861 - PCI-to-USB Bridge c1997
OPTi 82C862 - PCI-to-USB Bridge 4x port
OPTi 82C863 - PCI-to-USB Bridge 2x port
OPTi 82C871 - PCI-to-USB Bridge + Sound Blaster compatibility and USB 2.0
OPTi 82C916 - Audio, ISA, serial CODEC) used in combination with Vendetta chipset 82C750
OPTi 82C924 - Audio, ISA
OPTi 82C925 - ISA Audio Controller (replaces the 924)
OPTi 82C928 - (MAD16) ISA Audio Controller (Emulates Sound Blaster Pro) c1993
OPTi 82C929 - (MAD16 Pro) ISA Audio Controller (Emulates Sound Blaster Pro) c1994
OPTi 82C930 - ISA Audio Controller (Emulates Sound Blaster Pro, AdLib)
OPTi 82C931 - ISA Audio controller (Emulates Sound Blaster Pro, AdLib)
OPTi 82C933 - Audio ?????????????????????????????
OPTi 82C935 - EV1935 ECTIVA MachOne PCI Audio
OPTi 82C941 - Wavetable chip, has something to do with 82C930
OPTi 82C950 - (MAD32) Audio/Modem controller (Emulates Sound Blaster Pro) c1994
OPTi 92C160 - Clock Generator for 92C168
OPTi 92C168 - LCD VGA controller c1993
OPTi 92C178 - LCD VGA controller with blt c1993
OPTi 92C264 - 2D VGA controller
-------------------------------------------------
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
**VT82C597/AT Apollo VP3, Single-Chip for Pentium with AGP <10/03/97
***Info:
The Apollo-VP3 is a high performance, cost-effective and energy
efficient chip set for the implementation of AGP / PCI / ISA desktop
and notebook personal computer systems based on 64-bit Socket-7 (Intel
Pentium and Pentium MMX; AMD K5 / 5k86 and K6 / 6k86; and Cyrix / IBM
6x86 / M2) super-scalar processors.
The Apollo-VP3 chip set consists of the VT82C597 system controller
(472 pin BGA) and the VT82C586B PCI to ISA bridge (208 pin PQFP). The
VT82C597 system controller provides superior performance between the
CPU, optional synchronous cache, DRAM, AGP bus, and PCI bus with
pipelined, burst, and concurrent operation. For pipelined burst
synchronous SRAMs, 3-1-1-1-1-1-1-1 timing can be achieved for both
read and write transactions at 66 MHz. Four cache lines (16
quadwords) of CPU/cache to DRAM write buffers with concurrent
write-back capability are included on chip to speed up cache read and
write miss cycles.
The VT82C597 supports six banks of DRAMs up to 1GB. The DRAM
controller supports standard Fast Page Mode (FPM) DRAM, EDO-DRAM,
Synchronous DRAM (SDRAM), and SDRAM-II with Double Data Rate (DDR) in
a flexible mix / match manner. The Synchronous DRAM interface allows
zero wait state bursting between the DRAM and the data buffers at
66Mhz. The six banks of DRAM can be composed of an arbitrary mixture
of 1M / 2M / 4M / 8M / 16MxN DRAMs. The DRAM controller also supports
optional ECC (single-bit error correction and multi-bit detection) or
EC (error checking) capability separately selectable on a bank-by-bank
basis.
The VT82C597 also supports full AGP v1.0 capability for maximum bus
utilization including 2x mode transfers, SBA (SideBand Addressing),
Flush/Fence commands, and pipelined grants. An eight level request
queue plus a four level post-write request queue with thirty-two and
sixteen quadwords of read and write data FIFO's respectively are
included for deep pipelined and split AGP transactions. A
single-level GART TLB with 16 full associative entries and flexible
CPU/AGP/PCI remapping control is also provided for operation under
protected mode operating environments.
The VT82C597 supports two 32-bit 3.3 / 5V system buses (one AGP and
one PCI) with 64-bit to 32-bit data conversion. The 82C597 also
contains a built-in bus-to-bus bridge to allow simultaneous concurrent
operations on each bus. Five levels (doublewords) of post write
buffers are included to allow for concurrent CPU and PCI operation.
Consecutive CPU addresses are converted into burst PCI cycles with
byte merging capability for optimal CPU to PCI throughput. For PCI
master operation, forty-eight levels (doublewords) of post write
buffers and sixteen levels (doublewords) of prefetch buffers are
included for concurrent PCI bus and DRAM/cache accesses. The chipset
also supports enhanced PCI bus commands such as Memory-Read-Line,
Memory-Read-Multiple and Memory-Write-Invalid commands to minimize
snoop overhead. In addition, the chipset supports advanced features
such as snoop ahead, snoop filtering, L1 write-back forward to PCI
master and L1 write-back merged with PCI post write buffers to
minimize PCI master read latency and DRAM utilization. The VT82C586B
PCI to ISA bridge supports four levels (doublewords) of line buffers,
type F DMA transfers and delay transaction to allow efficient PCI bus
utilization and (PC I-2.1 compliant). The VT82C586B also includes an
integrated keyboard controller with PS2 mouse support, integrated
DS12885 style real time clock with extended 256 byte CMOS RAM,
integrated master mode enhanced IDE controller with full scatter and
gather capability and extension to UltraDMA-33 / ATA-33 for 33MB/sec
transfer rate, integrated USB interface with root hub and two function
ports with built-in physical layer transceivers, Distributed DMA
support, and OnNow / ACPI compliant advanced configuration and power
management interface. A complete main board can be implemented with
only six TTLs.
The Apollo VP3 chipset is ideal for high performance, high quality,
high energy efficient and high integration desktop and notebook AGP /
PCI / ISA computer systems.
***Configurations:...
***Features:...
**VT82C598MVP Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501 Apollo MVP4,Single-Chip 66-100MHz & AGP <11/04/98...
**VT82C680 Apollo P6, Pentium-Pro Chip Set <08/30/96...
**Support chips:
**VT82C505 Pentium/486 VL to PCI Bridge <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller <10/13/96...
**VT82C596/A Mobile PCI Integrated Peripheral Controller <11/05/97...
**VT82C686A/B PCI Super-I/O Integrated Peripheral Ctrl. <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
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