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*_IBM...
*ACC Micro...
**ACC82010   AT Chip Set          (286 12.5/16MHz Max)             c88
***info:...
***Configurations:...
***Features:...
**ACC82020   Turbo PC/AT Chip Set (286/386SX 25MHz Max)            c88...
**ACC82021   Turbo PC/AT Chip Set (286/386SX 25MHz Max)            >88...
**ACC82300   386 AT Chip Set (386DX)                               c88...
**ACC82C100  Single-Chip PC/XT Systems-Controller                  c90...
**ACC83000   Model 30 Integrated Chip Set (MCA)                    c88...
**ACC85000/A Model 50/60 Chipset (MCA)                             c88...
**ACC1000    Turbo PC/XT Integrated Bus and Peripheral Ctrl.  04/02/88...
**ACC2036    Single Chip Solution 2036 (286/386SX)              <Jul92...
**ACC2046/ST 486DX/486SX/386DX Single Chip AT                   <Jul92...
**ACC2048    WB 486 Notebook/Embedded Single Chip [no datasheet]     ?...
**ACC2051/NT PCI Single Chip Solution for Notebook Applications    c96...
**ACC2056    ?Pentium 3.3V Notebook               [no datasheet]<Jan96...
**ACC2057    PCI Notebook/Embedded Single Chip    [no datasheet]<Aug96...
**ACC2066NT  486 Notebook/Embedded Single Chip    [no datasheet]     ?...
**ACC2086    486 VL-based System Super Chip Soluti[no datasheet]     ?...
**ACC2087    Enhanced Super Chip (486 Single Chip)              <Aug96...
**ACC2089    486 PCI-based System Super Chip      [no datasheet]     ?...
**ACC2168/GT 32-bit 486 Green System Single Chip  [no datasheet]     ?...
**ACC2178A   32-bit 486 Green System Single Chip  [no datasheet]     ?...
**ACC2268    ?486                                 [no datasheet]     ?...
**ACC????    Maple/Maple-133 486-System-On-Chip   [no datasheet]     ?...
**
**Support Chips:
**ACC2016    Buffer and MUX Logic                                  c96...
**ACC2020    Power Management Chip                                 c92...
**ACC5500    Multifunction I/O Control Chip for PS2 Model 50/60    c88...
**
**Other chips...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
**SLXXXX   Other chips
SL9091 Video Clock Chip
**
**VT82C470     "Jupiter", Chip Set (w/o cache) 386 [no datasheet]    ?
**VT82C475     "Jupiter", Chip Set (w/cache) 386   [no datasheet]    ?
**VT82C486/2/3 "GMC chipset"            [no datasheet, some info]    ?...
**VT82C495/480 "Venus" Chip Set                    [no datasheet]    ?
**VT82C495/491 ? EISA Chip Set          [no datasheet, some info]  <93...
**VT82C496G    Pluto, Green PC 80486 PCI/VL/ISA System       <05/30/94...
**VT82C530MV   3.3V Pentium chipset [no datasheet, some info]<05/30/94...
**VT82C570M    Apollo Master, Green Pentium/P54C             <06/22/95...
**VT82C580VP   Apollo VP,  Pentium/M1/K5 PCI/ISA System      <02/15/96...
**VT82C580VPX  Apollo VPX, VPX/97, Pentium with 66/75MHz Bus <01/09/97
***Notes:...
***Info:...
***Configurations:...
***Features:
o   Flexible CPU Interface
    - Supports 64-bit Pentium, AMD 5k86, AMD 6k86 and Cyrix 6x86 CPUs
    - CPU external bus speed up to 75 MHz (asynchronous) or 66MHz 
      (synchronous) (internal 200Mhz and above)
    - Supports CPU internal write-back cache
    - System management interrupt, memory remap and STPCLK mechanism
    - Cyrix 6x86 linear burst support
    - CPU NA# / Address pipeline capability
o   Low Cost
    - PQFP packaging for low-cost implementation of 64-bit Pentium-
      CPU, 64-bit system memory, and 32-bit PCI
    - VT82C580 Apollo VPX Chipset:  VT82C585VPX system controller and 
      VT82C587VP Data Buffers
    - VT82C586B includes UltraDMA-33 EIDE, USB, and Keyboard / Mouse 
      Interfaces plus RTC / CMOS
    - Six TTLs for a complete main board implementation
o   PCI/ISA Green PC Ready
    - Supports 3.3V or 5V interface to CPU, system memory, and / or 
      PCI bus
    - Supports CPUs with internal voltages below 3.3V
    - PC-97 compatible using VT82C586B South Bridge with ACPI 
      Power Management
o   Advanced Cache Controller
    - Direct map write back or write through secondary cache
    - Pipelined burst synchronous SRAM (PBSRAM) cache support
    - Flexible cache size: 0K/256K/512K/1M/2MB
    - 32 byte line size to match the primary cache
    - Integrated 10-bit tag comparator
    - 3-1-1-1 read/write timing for PBSRAM access at 66/75 MHz
    - 3-1-1-1-1-1-1-1 back to back read timing for PBSRAM access 
      at 66/75 MHz
    - Sustained 3 cycle write access for PBSRAM access or CPU to 
      DRAM and PCI bus post write buffers at 66/75 MHz
    - Data streaming for simultaneous primary and secondary cache 
      line fill
    - System and video BIOS cacheable and write-protect
    - Programmable cacheable region and cache timing
o   Fast DRAM Controller
    - Fast Page Mode/EDO/Synchronous-DRAM support in a mixed 
      combination
    - Mixed 1M/2M/4M/8M/16MxN DRAMs
    - 6 banks up to 512MB DRAMs
    - Flexible row and column addresses
    - 64-bit or 32-bit data width in arbitrary mixed combination
    - 3.3v and 5v DRAM without external buffers
    - Two-bank interleaving for 16Mbit SDRAM support
    - Two-bank and four bank interleaving for 64Mbit SDRAM support 
      (14 MA lines)
    - Four cache lines (16 quadwords) of CPU/cache to DRAM write 
      buffers
    - Concurrent DRAM writeback
    - Speculative DRAM access
    - Read around write capability for non-stalled CPU read
    - Burst read and write operation
    - 4-2-2-2 on page, 7-2-2-2 start page and 9-2-2-2 off page timing 
      for EDO DRAMs at 50/60 MHz
    - 5-2-2-2 on page, 8-2-2-2 start page and 11-2-2-2 off page timing 
      for EDO DRAMs at 66 MHz
    - 6-1-1-1 on page, 8-1-1-1 start page and 10-1-1-1 off page for 
      SDRAMs at 66 MHz
    - 5-2-2-2-3-1-2-2 back-to-back access for EDO DRAM at 66 MHz
    - 6-1-1-1-3-1-1-1 back-to-back access for SDRAM at 66 MHz
    - BIOS shadow at 16KB increment
    - Decoupled and burst DRAM refresh with staggered RAS timing
    - Programmable refresh rate, CAS-before-RAS refresh and refresh 
      on populated banks only
o   Intelligent PCI Bus Controller
    - 32 bit 3.3/5v PCI interface
    - Synchronous divide-by-two and asynchronous PCI bus interface
    - PCI master snoop ahead and snoop filtering
    - PCI master peer concurrency
    - Synchronous bus to CPU clock with divide-by-two from the CPU 
      clock
    - Automatic detection of data streaming burst cycles from CPU to 
      the PCI bus
    - Five levels (double-words) of CPU to PCI posted write buffers
    - Byte merging in the write buffers to reduce the number of PCI 
      cycles and to create further PCI bursting possibilities
    - Zero wait state PCI master and slave burst transfer rate
    - PCI to system memory data streaming up to 132Mbyte/sec
    - Forty-eight levels (double-words) of post write buffers from 
      PCI masters to DRAM
    - Sixteen levels (double-words) of prefetch buffers from DRAM 
      for access by PCI masters
    - Enhanced PCI command optimization (MRL, MRM, MWI, etc.)
    - Complete steerable PCI interrupts
    - Supports L1 write-back forward to PCI master read to minimize 
      PCI read latency
    - Supports L1 write-back merged with PCI master post-write to 
      minimize DRAM utilization
    - Provides transaction timer to fairly arbitrate between PCI 
      masters
    - PCI-2.1 compliant
o   Built-in nand-tree pin scan test capability
o   0.6um mixed voltage, high speed / low power CMOS process
o   VT82C585VPX:  208-pin PQFP Package
o   VT82C587VP:  100-pin PQFP Package

**VT82C590     Apollo VP2, VP2/97, Single-Chip Pentium 66MHz <01/10/97...
**VT82C597/AT  Apollo VP3, Single-Chip for Pentium with AGP  <10/03/97...
**VT82C598MVP  Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501       Apollo MVP4,Single-Chip 66-100MHz & AGP       <11/04/98...
**VT82C680     Apollo P6, Pentium-Pro Chip Set               <08/30/96...
**Support chips:
**VT82C505     Pentium/486 VL to PCI Bridge                  <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller          <10/13/96...
**VT82C596/A   Mobile PCI Integrated Peripheral Controller   <11/05/97...
**VT82C686A/B  PCI Super-I/O Integrated Peripheral Ctrl.     <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
**Other...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

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