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**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
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**450NX (?) 06/29/98:...
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*VIA...
**SL9352 80386DX System and Memory Controller <06/12/90
***Info:
VIA’s System and Memory Controller SL9352, has the logic for the
System Control, Memory Control, Data Control and chip select for some
of the peripherals used in an AT system. The device is fully
configurable via software. No external hardware jumpers are needed to
utilize its features. Default values are provided to boot any system
configuration. On reset, BIOS routines are used to program the device,
transparent to the user, to utilize its special features.
Four configuration registers in the System Control Logic control the
AT bus and peripheral bus operations. Synchronous and asynchronous bus
operations are supported. In synchronous mode, bus clock is derived
from the processor's CLK2. In asynchronous mode, it is derived from an
independent external bus clock pin.
Support for page mode and non-page mode operation with non-interleave
or word /multi-page interleave, along with programmable memory timing,
allow the system designer to get maximum performance for the chosen
DRAMs. High drive for RAS, CAS, memory address, and write lines are
provided to connect SL9352 directly to a large DRAM memory array
without external buffering. In addition, CAS for all the banks in
non-interleave and 2-way interleave are provided to reduce external
gates.
Shadowing features are supported in 16K granularity from 640K to
1M. Remap options allow shadowing of eight different combinations of
tap of memory, Local ROM, and Video ROM to 640K to 1M region.
VlA's System and Memory Controller, SL9352, can be used with two of
VIA's SL9020 Data Controllers, or with discrete latches and
buffers. Data direction and enable signals for the data controller are
provided for both modes of operation.
SL9352 provides decoding for the Real Time Clock and Keyboard
Controller, thus avoiding external decoding gates. In addition, Port B
logic, PS/Z Compatible Port 92 for fast reset, and A20GATE provide the
necessary logic support for a one-chip solution.
***Versions:...
***Features:...
**SLXXXX Other chips...
**
**VT82C470 "Jupiter", Chip Set (w/o cache) 386 [no datasheet] ?
**VT82C475 "Jupiter", Chip Set (w/cache) 386 [no datasheet] ?
**VT82C486/2/3 "GMC chipset" [no datasheet, some info] ?...
**VT82C495/480 "Venus" Chip Set [no datasheet] ?
**VT82C495/491 ? EISA Chip Set [no datasheet, some info] <93...
**VT82C496G Pluto, Green PC 80486 PCI/VL/ISA System <05/30/94...
**VT82C530MV 3.3V Pentium chipset [no datasheet, some info]<05/30/94...
**VT82C570M Apollo Master, Green Pentium/P54C <06/22/95...
**VT82C580VP Apollo VP, Pentium/M1/K5 PCI/ISA System <02/15/96...
**VT82C580VPX Apollo VPX, VPX/97, Pentium with 66/75MHz Bus <01/09/97
***Notes:...
***Info:
The VT82C580VPX Apollo-VPX is a high performance, cost-effective and
energy efficient chip set for implementation of PCI / ISA desktop and
notebook personal computer systems based on 64-bit P54C/
Pentium/K5/K6/M1 super-scalar processors. The CPU / cache connection
is supported using an "asynchronous" interface up to 75Mhz CPU
external bus speed (with CPU internal speed up to 200Mhz and above),
with CPUs such as the "P200+" processors from Cyrix / IBM
Microelectronics. The "asynchronous" interface allows the processor
external bus frequency to be increased above 66MHz while still
allowing the PCI bus to run at the specified top frequency of 33MHz.
The chipset also supports CPU external bus speeds up to 66MHz in
"synchronous" mode, so may also be used in boards designed around the
popular VT82C580VP (Apollo VP) chipset. The 66MHz external bus speed
is used primarily for Intel and AMD processors. The CPU, DRAM and PCI
bus are all independently powered so that each of the bus can be run
at 3.3v or 5v, independently. The ISA bus always runs at 5v.
The VT82C580VPX chip set consists of the VT82C585VPX system
controller, the VT82C586B PCI to ISA bridge, and two instances of the
VT82C587VP data buffers. The VT82C585VPX is the only different
component in a VPX-based system from the chips used in an Apollo VP
system: the same VT82C586B South Bridge chip may be used with all VIA
North Bridge chips (Pentium and PentiumPro-based designs) and the
VT82C587VP Data Buffer is the same chip as is used in Apollo VP
designs.
The CPU bus is minimally loaded with only the CPU, secondary cache and
the chip set. The VT82C587VP data buffers isolate the CPU bus from
the DRAM and PCI bus so that CPU and cache operation may run reliably
at the high frequencies demanded by today's processors. The
VT82C585VPX contains multiple deep FIFOs to allow efficient concurrent
operation and DRAM utilization. The VT82C586B PCI to ISA bridge
includes integrated 206-style IPC (DMA, interrupt controller and
timer), integrated keyboard controller with PS2 mouse support,
integrated DS12885 style real time clock with extended 256 byte CMOS
RAM, ACPI-compatible Power Management subsystem, integrated master
mode enhanced IDE / UltraDMA-33 disk controller with full scatter and
gather capability, and integrated USB (universal serial bus) interface
with root hub and two function ports with built-in physical layer
transceivers (refer to the separate VT82C586B Data Sheet for
additional information). A complete main board can be implemented
with only six TTLs. Refer to Figure 1 [see datasheet] for the system
block diagram.
***Configurations:...
***Features:...
**VT82C590 Apollo VP2, VP2/97, Single-Chip Pentium 66MHz <01/10/97...
**VT82C597/AT Apollo VP3, Single-Chip for Pentium with AGP <10/03/97...
**VT82C598MVP Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501 Apollo MVP4,Single-Chip 66-100MHz & AGP <11/04/98...
**VT82C680 Apollo P6, Pentium-Pro Chip Set <08/30/96...
**Support chips:
**VT82C505 Pentium/486 VL to PCI Bridge <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller <10/13/96...
**VT82C596/A Mobile PCI Integrated Peripheral Controller <11/05/97...
**VT82C686A/B PCI Super-I/O Integrated Peripheral Ctrl. <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
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