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**450NX (?) 06/29/98:
Chips:
[82454NX] (PXB) [82453NX] (MUX)
[82452NX] (RCG) [82451NX] (MIOC)
[82371EB] (PIIX4E),
CPUs: Single/Dual/Quad P-II Xeon/P-III Xeon
DRAM Types: FPM EDO 2-way Interleave 4-way Interleave
Mem Rows: 8
DRAM Density: 16Mbit 64Mbit
Max Mem: 8GB
ECC/Parity: Both
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C496/7 DXBB PC/AT Chipset (Cached) <01/16/92
***Info:...
***Configurations:...
***Features:...
**82C498 DXWB PC/AT chipset [no datasheet] ?...
**82C499 DXSC DX System Controller c:93...
**82C546/547 Python PTM3V c:94...
**82C556/7/8 Viper [no datasheet] ?...
**82C556/7/8N Viper-N Viper Notebook Chipset <05/25/95...
**82C556M/7M/8E Viper-N+ Viper Notebook Chipset c:96...
**82C566/7/8 Viper-Max Chipset Scalable MultiMedia PC Solution ?...
**82C571/572 486/Pentium c:93...
**82C576/7/8 Viper Xpress [no datasheet] ?...
**82C576/8/9 Viper XPress+ [no datasheet, some info] <01/16/97...
**82C596/597 PTMAWB Pentium Adaptive Write-back (Cobra) c:93...
**82C650/1/2 Discovery (Pentium Pro) [no datasheet] ?...
**82C681/2/6/7 386/486WB EISA c:92...
**82C683 386/486AWB EISA [no datasheet] ?...
**82C693/6/7 Pentium uP Write Back Cache EISA c:93...
**82C700 FireStar c:97...
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
**VT82C580VPX Apollo VPX, VPX/97, Pentium with 66/75MHz Bus <01/09/97
***Notes:...
***Info:
The VT82C580VPX Apollo-VPX is a high performance, cost-effective and
energy efficient chip set for implementation of PCI / ISA desktop and
notebook personal computer systems based on 64-bit P54C/
Pentium/K5/K6/M1 super-scalar processors. The CPU / cache connection
is supported using an "asynchronous" interface up to 75Mhz CPU
external bus speed (with CPU internal speed up to 200Mhz and above),
with CPUs such as the "P200+" processors from Cyrix / IBM
Microelectronics. The "asynchronous" interface allows the processor
external bus frequency to be increased above 66MHz while still
allowing the PCI bus to run at the specified top frequency of 33MHz.
The chipset also supports CPU external bus speeds up to 66MHz in
"synchronous" mode, so may also be used in boards designed around the
popular VT82C580VP (Apollo VP) chipset. The 66MHz external bus speed
is used primarily for Intel and AMD processors. The CPU, DRAM and PCI
bus are all independently powered so that each of the bus can be run
at 3.3v or 5v, independently. The ISA bus always runs at 5v.
The VT82C580VPX chip set consists of the VT82C585VPX system
controller, the VT82C586B PCI to ISA bridge, and two instances of the
VT82C587VP data buffers. The VT82C585VPX is the only different
component in a VPX-based system from the chips used in an Apollo VP
system: the same VT82C586B South Bridge chip may be used with all VIA
North Bridge chips (Pentium and PentiumPro-based designs) and the
VT82C587VP Data Buffer is the same chip as is used in Apollo VP
designs.
The CPU bus is minimally loaded with only the CPU, secondary cache and
the chip set. The VT82C587VP data buffers isolate the CPU bus from
the DRAM and PCI bus so that CPU and cache operation may run reliably
at the high frequencies demanded by today's processors. The
VT82C585VPX contains multiple deep FIFOs to allow efficient concurrent
operation and DRAM utilization. The VT82C586B PCI to ISA bridge
includes integrated 206-style IPC (DMA, interrupt controller and
timer), integrated keyboard controller with PS2 mouse support,
integrated DS12885 style real time clock with extended 256 byte CMOS
RAM, ACPI-compatible Power Management subsystem, integrated master
mode enhanced IDE / UltraDMA-33 disk controller with full scatter and
gather capability, and integrated USB (universal serial bus) interface
with root hub and two function ports with built-in physical layer
transceivers (refer to the separate VT82C586B Data Sheet for
additional information). A complete main board can be implemented
with only six TTLs. Refer to Figure 1 [see datasheet] for the system
block diagram.
***Configurations:...
***Features:...
**VT82C590 Apollo VP2, VP2/97, Single-Chip Pentium 66MHz <01/10/97...
**VT82C597/AT Apollo VP3, Single-Chip for Pentium with AGP <10/03/97...
**VT82C598MVP Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501 Apollo MVP4,Single-Chip 66-100MHz & AGP <11/04/98...
**VT82C680 Apollo P6, Pentium-Pro Chip Set <08/30/96...
**Support chips:
**VT82C505 Pentium/486 VL to PCI Bridge <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller <10/13/96...
**VT82C596/A Mobile PCI Integrated Peripheral Controller <11/05/97...
**VT82C686A/B PCI Super-I/O Integrated Peripheral Ctrl. <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
**Other...
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*ZyMOS...
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