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**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:...
***Features:
o   Two-Way, Set Associative, Secondary Cache for i860 XP 
    Microprocessor
o   50 MHz "No Glue" Interface with CPU
o   Configurable
    - Cache Size 256 or 512 Kbytes
    - Line Width 32, 64 or 128 Bytes
    - Memory Bus Width 64 or 128 Bits
o   Dual-Ported Structure Permits Simultaneous Operations on CPU and
    Memory Buses
o   Efficient MRU Way Prediction
    - Zero Wait States on MRU Hit
    - One Walt State on MRU Miss
o   Dynamically Selectable Update Policies
    - Write-Through
    - Write-Once
    - Write-Back
o   MESI Cache Consistency Protocol
o   Hardware Cache Snooping
o   Maintains Consistency with Primary Cache via Inclusion Principle
o   Flexible User-Implemented Memory Interface Enables Wide Range of
    Product Differentiation
    - Clocked or Strobed
    - Synchronous or Asynchronous
    - Plpelining
    - Memory Bus Protocol
o   82495XP Cache Controller Available in 208-Lead Ceramic Pin Grid 
    Array Package
o   82490XP Cache RAM Available in 84-Lead Plastic Quad Flatpack 
    Package

**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**5501/5502/5503 Pentium/P54C PCI/ISA Chipset                <04/02/95
***Info:...
***Configurations:...
***Features:...
**5511/5512/5513 Pentium PCI/ISA                             <06/14/95...
**5571           (Trinity) Pentium PCI/ISA Chipset (75MHz)   <12/09/96...
**5581/5582      (Jessie)  Pentium PCI/ISA Chipset (75MHz)   <04/15/97...
**5591/5592/5595 (David)   Pentium PCI A.G.P. Chipset        <01/09/98...
**5596/5513      (Genesis) Pentium PCI Chipset               <03/26/96...
**5597/5598      (Jedi)    Pentium PCI/ISA Chipset           <04/15/97...
**530/5595       (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
**VT82C580VP   Apollo VP,  Pentium/M1/K5 PCI/ISA System      <02/15/96
***Info:
The  VT82C580VP Apollo-VP  is a  high performance,  cost-effective and
energy efficient  chip set for  the implementation of  PCI/ISA desktop
and   notebook  personal   computer  systems   based  on   the  64-bit
P54C/Pentium/K5/M1 super-scalar processors. CPU and cache interface is
supported up to 66Mhz CPU  external bus speed (with CPU internal speed
up  to  200Mhz  and  above).  The  CPU,  DRAM  and  PCI  bus  are  all
independently powered  so that each of the  bus can be run  at 3.3v or
5v, independently. The ISA bus always runs at 5v.

The VT82C580VP chip set  consists of the VT82C585VP system controller,
the VT82C586  PCI to ISA bridge,  and two instances  of the VT82C587VP
data  buffers. The  CPU bus  is minimally  loaded with  only  the CPU,
secondary cache and the chip  set. The VT82C587VP data buffers isolate
the CPU bus from the DRAM and  PCI bus so that CPU and cache operation
may  run  reliably  at   the  high  frequencies  demanded  by  today's
processors. The  VT82C585VP contains arbitration logic  to support the
UMA (unified  memory architecture) with video/GUI  products from major
video  vendors.  Multiple  deep  FIFOs (thirty-two  double words)  are
included  between multiple  data paths  to allow  efficient concurrent
operation  and  DRAM utilization.   The  VT82C586  PCI  to ISA  bridge
includes  integrated  206-style  IPC  (DMA, interrupt  controller  and
timer),  integrated  keyboard   controller  with  PS2  mouse  support,
integrated DS12885 style  real time clock with extended  128 byte CMOS
RAM, integrated master mode  enhanced IDE controller with full scatter
and  gather  capability, and  integrated  USB  (universal serial  bus)
interface with root hub and  two function ports with built-in physical
layer transceiver. A complete main  board can be implemented with only
six  TTLs. Please refer  to Figure  1 [see  datasheet] for  the system
block diagram.

***Configurations:...
***Features:...
**VT82C580VPX  Apollo VPX, VPX/97, Pentium with 66/75MHz Bus <01/09/97...
**VT82C590     Apollo VP2, VP2/97, Single-Chip Pentium 66MHz <01/10/97...
**VT82C597/AT  Apollo VP3, Single-Chip for Pentium with AGP  <10/03/97...
**VT82C598MVP  Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501       Apollo MVP4,Single-Chip 66-100MHz & AGP       <11/04/98...
**VT82C680     Apollo P6, Pentium-Pro Chip Set               <08/30/96...
**Support chips:
**VT82C505     Pentium/486 VL to PCI Bridge                  <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller          <10/13/96...
**VT82C596/A   Mobile PCI Integrated Peripheral Controller   <11/05/97...
**VT82C686A/B  PCI Super-I/O Integrated Peripheral Ctrl.     <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
**Other...
*VLSI...
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*ZyMOS...
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